424 lines
14 KiB
NASM
424 lines
14 KiB
NASM
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;******************************************************************************
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;* x86-optimized horizontal line scaling functions
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;* Copyright (c) 2011 Ronald S. Bultje <rsbultje@gmail.com>
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION_RODATA
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max_19bit_int: times 4 dd 0x7ffff
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max_19bit_flt: times 4 dd 524287.0
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minshort: times 8 dw 0x8000
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unicoeff: times 4 dd 0x20000000
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SECTION .text
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;-----------------------------------------------------------------------------
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; horizontal line scaling
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;
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; void hscale<source_width>to<intermediate_nbits>_<filterSize>_<opt>
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; (SwsContext *c, int{16,32}_t *dst,
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; int dstW, const uint{8,16}_t *src,
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; const int16_t *filter,
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; const int32_t *filterPos, int filterSize);
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;
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; Scale one horizontal line. Input is either 8-bit width or 16-bit width
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; ($source_width can be either 8, 9, 10 or 16, difference is whether we have to
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; downscale before multiplying). Filter is 14 bits. Output is either 15 bits
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; (in int16_t) or 19 bits (in int32_t), as given in $intermediate_nbits. Each
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; output pixel is generated from $filterSize input pixels, the position of
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; the first pixel is given in filterPos[nOutputPixel].
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;-----------------------------------------------------------------------------
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; SCALE_FUNC source_width, intermediate_nbits, filtersize, filtersuffix, n_args, n_xmm
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%macro SCALE_FUNC 6
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%ifnidn %3, X
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cglobal hscale%1to%2_%4, %5, 7, %6, pos0, dst, w, src, filter, fltpos, pos1
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%else
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cglobal hscale%1to%2_%4, %5, 10, %6, pos0, dst, w, srcmem, filter, fltpos, fltsize
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%endif
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%if ARCH_X86_64
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movsxd wq, wd
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%define mov32 movsxd
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%else ; x86-32
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%define mov32 mov
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%endif ; x86-64
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%if %2 == 19
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%if mmsize == 8 ; mmx
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mova m2, [max_19bit_int]
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%elif cpuflag(sse4)
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mova m2, [max_19bit_int]
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%else ; ssse3/sse2
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mova m2, [max_19bit_flt]
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%endif ; mmx/sse2/ssse3/sse4
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%endif ; %2 == 19
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%if %1 == 16
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mova m6, [minshort]
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mova m7, [unicoeff]
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%elif %1 == 8
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pxor m3, m3
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%endif ; %1 == 8/16
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%if %1 == 8
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%define movlh movd
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%define movbh movh
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%define srcmul 1
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%else ; %1 == 9-16
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%define movlh movq
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%define movbh movu
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%define srcmul 2
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%endif ; %1 == 8/9-16
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%ifnidn %3, X
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; setup loop
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%if %3 == 8
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shl wq, 1 ; this allows *16 (i.e. now *8) in lea instructions for the 8-tap filter
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%define wshr 1
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%else ; %3 == 4
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%define wshr 0
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%endif ; %3 == 8
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lea filterq, [filterq+wq*8]
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%if %2 == 15
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lea dstq, [dstq+wq*(2>>wshr)]
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%else ; %2 == 19
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lea dstq, [dstq+wq*(4>>wshr)]
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%endif ; %2 == 15/19
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lea fltposq, [fltposq+wq*(4>>wshr)]
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neg wq
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.loop:
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%if %3 == 4 ; filterSize == 4 scaling
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; load 2x4 or 4x4 source pixels into m0/m1
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mov32 pos0q, dword [fltposq+wq*4+ 0] ; filterPos[0]
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mov32 pos1q, dword [fltposq+wq*4+ 4] ; filterPos[1]
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movlh m0, [srcq+pos0q*srcmul] ; src[filterPos[0] + {0,1,2,3}]
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%if mmsize == 8
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movlh m1, [srcq+pos1q*srcmul] ; src[filterPos[1] + {0,1,2,3}]
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%else ; mmsize == 16
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%if %1 > 8
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movhps m0, [srcq+pos1q*srcmul] ; src[filterPos[1] + {0,1,2,3}]
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%else ; %1 == 8
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movd m4, [srcq+pos1q*srcmul] ; src[filterPos[1] + {0,1,2,3}]
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%endif
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mov32 pos0q, dword [fltposq+wq*4+ 8] ; filterPos[2]
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mov32 pos1q, dword [fltposq+wq*4+12] ; filterPos[3]
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movlh m1, [srcq+pos0q*srcmul] ; src[filterPos[2] + {0,1,2,3}]
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%if %1 > 8
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movhps m1, [srcq+pos1q*srcmul] ; src[filterPos[3] + {0,1,2,3}]
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%else ; %1 == 8
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movd m5, [srcq+pos1q*srcmul] ; src[filterPos[3] + {0,1,2,3}]
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punpckldq m0, m4
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punpckldq m1, m5
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%endif ; %1 == 8
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%endif ; mmsize == 8/16
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%if %1 == 8
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punpcklbw m0, m3 ; byte -> word
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punpcklbw m1, m3 ; byte -> word
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%endif ; %1 == 8
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; multiply with filter coefficients
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%if %1 == 16 ; pmaddwd needs signed adds, so this moves unsigned -> signed, we'll
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; add back 0x8000 * sum(coeffs) after the horizontal add
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psubw m0, m6
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psubw m1, m6
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%endif ; %1 == 16
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pmaddwd m0, [filterq+wq*8+mmsize*0] ; *= filter[{0,1,..,6,7}]
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pmaddwd m1, [filterq+wq*8+mmsize*1] ; *= filter[{8,9,..,14,15}]
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; add up horizontally (4 srcpix * 4 coefficients -> 1 dstpix)
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%if mmsize == 8 ; mmx
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movq m4, m0
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punpckldq m0, m1
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punpckhdq m4, m1
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paddd m0, m4
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%elif notcpuflag(ssse3) ; sse2
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mova m4, m0
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shufps m0, m1, 10001000b
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shufps m4, m1, 11011101b
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paddd m0, m4
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%else ; ssse3/sse4
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phaddd m0, m1 ; filter[{ 0, 1, 2, 3}]*src[filterPos[0]+{0,1,2,3}],
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; filter[{ 4, 5, 6, 7}]*src[filterPos[1]+{0,1,2,3}],
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; filter[{ 8, 9,10,11}]*src[filterPos[2]+{0,1,2,3}],
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; filter[{12,13,14,15}]*src[filterPos[3]+{0,1,2,3}]
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%endif ; mmx/sse2/ssse3/sse4
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%else ; %3 == 8, i.e. filterSize == 8 scaling
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; load 2x8 or 4x8 source pixels into m0, m1, m4 and m5
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mov32 pos0q, dword [fltposq+wq*2+0] ; filterPos[0]
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mov32 pos1q, dword [fltposq+wq*2+4] ; filterPos[1]
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movbh m0, [srcq+ pos0q *srcmul] ; src[filterPos[0] + {0,1,2,3,4,5,6,7}]
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%if mmsize == 8
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movbh m1, [srcq+(pos0q+4)*srcmul] ; src[filterPos[0] + {4,5,6,7}]
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movbh m4, [srcq+ pos1q *srcmul] ; src[filterPos[1] + {0,1,2,3}]
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movbh m5, [srcq+(pos1q+4)*srcmul] ; src[filterPos[1] + {4,5,6,7}]
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%else ; mmsize == 16
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movbh m1, [srcq+ pos1q *srcmul] ; src[filterPos[1] + {0,1,2,3,4,5,6,7}]
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mov32 pos0q, dword [fltposq+wq*2+8] ; filterPos[2]
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mov32 pos1q, dword [fltposq+wq*2+12] ; filterPos[3]
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movbh m4, [srcq+ pos0q *srcmul] ; src[filterPos[2] + {0,1,2,3,4,5,6,7}]
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movbh m5, [srcq+ pos1q *srcmul] ; src[filterPos[3] + {0,1,2,3,4,5,6,7}]
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%endif ; mmsize == 8/16
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%if %1 == 8
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punpcklbw m0, m3 ; byte -> word
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punpcklbw m1, m3 ; byte -> word
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punpcklbw m4, m3 ; byte -> word
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punpcklbw m5, m3 ; byte -> word
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%endif ; %1 == 8
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; multiply
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%if %1 == 16 ; pmaddwd needs signed adds, so this moves unsigned -> signed, we'll
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; add back 0x8000 * sum(coeffs) after the horizontal add
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psubw m0, m6
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psubw m1, m6
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psubw m4, m6
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psubw m5, m6
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%endif ; %1 == 16
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pmaddwd m0, [filterq+wq*8+mmsize*0] ; *= filter[{0,1,..,6,7}]
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pmaddwd m1, [filterq+wq*8+mmsize*1] ; *= filter[{8,9,..,14,15}]
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pmaddwd m4, [filterq+wq*8+mmsize*2] ; *= filter[{16,17,..,22,23}]
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pmaddwd m5, [filterq+wq*8+mmsize*3] ; *= filter[{24,25,..,30,31}]
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; add up horizontally (8 srcpix * 8 coefficients -> 1 dstpix)
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%if mmsize == 8
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paddd m0, m1
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paddd m4, m5
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movq m1, m0
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punpckldq m0, m4
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punpckhdq m1, m4
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paddd m0, m1
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%elif notcpuflag(ssse3) ; sse2
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%if %1 == 8
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%define mex m6
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%else
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%define mex m3
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%endif
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; emulate horizontal add as transpose + vertical add
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mova mex, m0
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punpckldq m0, m1
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punpckhdq mex, m1
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paddd m0, mex
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mova m1, m4
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punpckldq m4, m5
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punpckhdq m1, m5
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paddd m4, m1
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mova m1, m0
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punpcklqdq m0, m4
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punpckhqdq m1, m4
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paddd m0, m1
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%else ; ssse3/sse4
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; FIXME if we rearrange the filter in pairs of 4, we can
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; load pixels likewise and use 2 x paddd + phaddd instead
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; of 3 x phaddd here, faster on older cpus
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phaddd m0, m1
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phaddd m4, m5
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phaddd m0, m4 ; filter[{ 0, 1,..., 6, 7}]*src[filterPos[0]+{0,1,...,6,7}],
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; filter[{ 8, 9,...,14,15}]*src[filterPos[1]+{0,1,...,6,7}],
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; filter[{16,17,...,22,23}]*src[filterPos[2]+{0,1,...,6,7}],
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; filter[{24,25,...,30,31}]*src[filterPos[3]+{0,1,...,6,7}]
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%endif ; mmx/sse2/ssse3/sse4
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%endif ; %3 == 4/8
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%else ; %3 == X, i.e. any filterSize scaling
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%ifidn %4, X4
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%define dlt 4
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%else ; %4 == X || %4 == X8
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%define dlt 0
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%endif ; %4 ==/!= X4
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%if ARCH_X86_64
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%define srcq r8
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%define pos1q r7
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%define srcendq r9
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movsxd fltsizeq, fltsized ; filterSize
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lea srcendq, [srcmemq+(fltsizeq-dlt)*srcmul] ; &src[filterSize&~4]
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%else ; x86-32
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%define srcq srcmemq
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%define pos1q dstq
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%define srcendq r6m
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lea pos0q, [srcmemq+(fltsizeq-dlt)*srcmul] ; &src[filterSize&~4]
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mov srcendq, pos0q
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%endif ; x86-32/64
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lea fltposq, [fltposq+wq*4]
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%if %2 == 15
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lea dstq, [dstq+wq*2]
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%else ; %2 == 19
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lea dstq, [dstq+wq*4]
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%endif ; %2 == 15/19
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movifnidn dstmp, dstq
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neg wq
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.loop:
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mov32 pos0q, dword [fltposq+wq*4+0] ; filterPos[0]
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mov32 pos1q, dword [fltposq+wq*4+4] ; filterPos[1]
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; FIXME maybe do 4px/iteration on x86-64 (x86-32 wouldn't have enough regs)?
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pxor m4, m4
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pxor m5, m5
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mov srcq, srcmemmp
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.innerloop:
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; load 2x4 (mmx) or 2x8 (sse) source pixels into m0/m1 -> m4/m5
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movbh m0, [srcq+ pos0q *srcmul] ; src[filterPos[0] + {0,1,2,3(,4,5,6,7)}]
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movbh m1, [srcq+(pos1q+dlt)*srcmul] ; src[filterPos[1] + {0,1,2,3(,4,5,6,7)}]
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%if %1 == 8
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punpcklbw m0, m3
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punpcklbw m1, m3
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%endif ; %1 == 8
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; multiply
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%if %1 == 16 ; pmaddwd needs signed adds, so this moves unsigned -> signed, we'll
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; add back 0x8000 * sum(coeffs) after the horizontal add
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psubw m0, m6
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psubw m1, m6
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%endif ; %1 == 16
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pmaddwd m0, [filterq] ; filter[{0,1,2,3(,4,5,6,7)}]
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pmaddwd m1, [filterq+(fltsizeq+dlt)*2]; filter[filtersize+{0,1,2,3(,4,5,6,7)}]
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paddd m4, m0
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paddd m5, m1
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add filterq, mmsize
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add srcq, srcmul*mmsize/2
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cmp srcq, srcendq ; while (src += 4) < &src[filterSize]
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jl .innerloop
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%ifidn %4, X4
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mov32 pos1q, dword [fltposq+wq*4+4] ; filterPos[1]
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movlh m0, [srcq+ pos0q *srcmul] ; split last 4 srcpx of dstpx[0]
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sub pos1q, fltsizeq ; and first 4 srcpx of dstpx[1]
|
||
|
|
%if %1 > 8
|
||
|
|
movhps m0, [srcq+(pos1q+dlt)*srcmul]
|
||
|
|
%else ; %1 == 8
|
||
|
|
movd m1, [srcq+(pos1q+dlt)*srcmul]
|
||
|
|
punpckldq m0, m1
|
||
|
|
%endif ; %1 == 8
|
||
|
|
%if %1 == 8
|
||
|
|
punpcklbw m0, m3
|
||
|
|
%endif ; %1 == 8
|
||
|
|
%if %1 == 16 ; pmaddwd needs signed adds, so this moves unsigned -> signed, we'll
|
||
|
|
; add back 0x8000 * sum(coeffs) after the horizontal add
|
||
|
|
psubw m0, m6
|
||
|
|
%endif ; %1 == 16
|
||
|
|
pmaddwd m0, [filterq]
|
||
|
|
%endif ; %4 == X4
|
||
|
|
|
||
|
|
lea filterq, [filterq+(fltsizeq+dlt)*2]
|
||
|
|
|
||
|
|
%if mmsize == 8 ; mmx
|
||
|
|
movq m0, m4
|
||
|
|
punpckldq m4, m5
|
||
|
|
punpckhdq m0, m5
|
||
|
|
paddd m0, m4
|
||
|
|
%else ; mmsize == 16
|
||
|
|
%if notcpuflag(ssse3) ; sse2
|
||
|
|
mova m1, m4
|
||
|
|
punpcklqdq m4, m5
|
||
|
|
punpckhqdq m1, m5
|
||
|
|
paddd m4, m1
|
||
|
|
%else ; ssse3/sse4
|
||
|
|
phaddd m4, m5
|
||
|
|
%endif ; sse2/ssse3/sse4
|
||
|
|
%ifidn %4, X4
|
||
|
|
paddd m4, m0
|
||
|
|
%endif ; %3 == X4
|
||
|
|
%if notcpuflag(ssse3) ; sse2
|
||
|
|
pshufd m4, m4, 11011000b
|
||
|
|
movhlps m0, m4
|
||
|
|
paddd m0, m4
|
||
|
|
%else ; ssse3/sse4
|
||
|
|
phaddd m4, m4
|
||
|
|
SWAP 0, 4
|
||
|
|
%endif ; sse2/ssse3/sse4
|
||
|
|
%endif ; mmsize == 8/16
|
||
|
|
%endif ; %3 ==/!= X
|
||
|
|
|
||
|
|
%if %1 == 16 ; add 0x8000 * sum(coeffs), i.e. back from signed -> unsigned
|
||
|
|
paddd m0, m7
|
||
|
|
%endif ; %1 == 16
|
||
|
|
|
||
|
|
; clip, store
|
||
|
|
psrad m0, 14 + %1 - %2
|
||
|
|
%ifidn %3, X
|
||
|
|
movifnidn dstq, dstmp
|
||
|
|
%endif ; %3 == X
|
||
|
|
%if %2 == 15
|
||
|
|
packssdw m0, m0
|
||
|
|
%ifnidn %3, X
|
||
|
|
movh [dstq+wq*(2>>wshr)], m0
|
||
|
|
%else ; %3 == X
|
||
|
|
movd [dstq+wq*2], m0
|
||
|
|
%endif ; %3 ==/!= X
|
||
|
|
%else ; %2 == 19
|
||
|
|
PMINSD m0, m2, m4
|
||
|
|
%ifnidn %3, X
|
||
|
|
mova [dstq+wq*(4>>wshr)], m0
|
||
|
|
%else ; %3 == X
|
||
|
|
movq [dstq+wq*4], m0
|
||
|
|
%endif ; %3 ==/!= X
|
||
|
|
%endif ; %2 == 15/19
|
||
|
|
%ifnidn %3, X
|
||
|
|
add wq, (mmsize<<wshr)/4 ; both 8tap and 4tap really only do 4 pixels (or for mmx: 2 pixels)
|
||
|
|
; per iteration. see "shl wq,1" above as for why we do this
|
||
|
|
%else ; %3 == X
|
||
|
|
add wq, 2
|
||
|
|
%endif ; %3 ==/!= X
|
||
|
|
jl .loop
|
||
|
|
REP_RET
|
||
|
|
%endmacro
|
||
|
|
|
||
|
|
; SCALE_FUNCS source_width, intermediate_nbits, n_xmm
|
||
|
|
%macro SCALE_FUNCS 3
|
||
|
|
SCALE_FUNC %1, %2, 4, 4, 6, %3
|
||
|
|
SCALE_FUNC %1, %2, 8, 8, 6, %3
|
||
|
|
%if mmsize == 8
|
||
|
|
SCALE_FUNC %1, %2, X, X, 7, %3
|
||
|
|
%else
|
||
|
|
SCALE_FUNC %1, %2, X, X4, 7, %3
|
||
|
|
SCALE_FUNC %1, %2, X, X8, 7, %3
|
||
|
|
%endif
|
||
|
|
%endmacro
|
||
|
|
|
||
|
|
; SCALE_FUNCS2 8_xmm_args, 9to10_xmm_args, 16_xmm_args
|
||
|
|
%macro SCALE_FUNCS2 3
|
||
|
|
%if notcpuflag(sse4)
|
||
|
|
SCALE_FUNCS 8, 15, %1
|
||
|
|
SCALE_FUNCS 9, 15, %2
|
||
|
|
SCALE_FUNCS 10, 15, %2
|
||
|
|
SCALE_FUNCS 12, 15, %2
|
||
|
|
SCALE_FUNCS 14, 15, %2
|
||
|
|
SCALE_FUNCS 16, 15, %3
|
||
|
|
%endif ; !sse4
|
||
|
|
SCALE_FUNCS 8, 19, %1
|
||
|
|
SCALE_FUNCS 9, 19, %2
|
||
|
|
SCALE_FUNCS 10, 19, %2
|
||
|
|
SCALE_FUNCS 12, 19, %2
|
||
|
|
SCALE_FUNCS 14, 19, %2
|
||
|
|
SCALE_FUNCS 16, 19, %3
|
||
|
|
%endmacro
|
||
|
|
|
||
|
|
%if ARCH_X86_32
|
||
|
|
INIT_MMX mmx
|
||
|
|
SCALE_FUNCS2 0, 0, 0
|
||
|
|
%endif
|
||
|
|
INIT_XMM sse2
|
||
|
|
SCALE_FUNCS2 7, 6, 8
|
||
|
|
INIT_XMM ssse3
|
||
|
|
SCALE_FUNCS2 6, 6, 8
|
||
|
|
INIT_XMM sse4
|
||
|
|
SCALE_FUNCS2 6, 6, 8
|