59 lines
		
	
	
		
			3.8 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
		
		
			
		
	
	
			59 lines
		
	
	
		
			3.8 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
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								/*
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								 * Copyright (c) 2016 Clément Bœsch <clement stupeflix.com>
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								 *
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								 * This file is part of FFmpeg.
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								 *
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								 * FFmpeg is free software; you can redistribute it and/or
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								 * modify it under the terms of the GNU Lesser General Public
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								 * License as published by the Free Software Foundation; either
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								 * version 2.1 of the License, or (at your option) any later version.
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								 *
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								 * FFmpeg is distributed in the hope that it will be useful,
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								 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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								 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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								 * Lesser General Public License for more details.
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								 *
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								 * You should have received a copy of the GNU Lesser General Public
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								 * License along with FFmpeg; if not, write to the Free Software
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								 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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								 */
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								#include "libavutil/aarch64/asm.S"
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								function ff_yuv2planeX_8_neon, export=1
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								        ld1                 {v0.8B}, [x5]                   // load 8x8-bit dither
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								        cbz                 w6, 1f                          // check if offsetting present
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								        ext                 v0.8B, v0.8B, v0.8B, #3         // honor offsetting which can be 0 or 3 only
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								1:      uxtl                v0.8H, v0.8B                    // extend dither to 16-bit
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								        ushll               v1.4S, v0.4H, #12               // extend dither to 32-bit with left shift by 12 (part 1)
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								        ushll2              v2.4S, v0.8H, #12               // extend dither to 32-bit with left shift by 12 (part 2)
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								        mov                 x7, #0                          // i = 0
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								2:      mov                 v3.16B, v1.16B                  // initialize accumulator part 1 with dithering value
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								        mov                 v4.16B, v2.16B                  // initialize accumulator part 2 with dithering value
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								        mov                 w8, w1                          // tmpfilterSize = filterSize
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								        mov                 x9, x2                          // srcp    = src
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								        mov                 x10, x0                         // filterp = filter
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								3:      ldp                 x11, x12, [x9], #16             // get 2 pointers: src[j] and src[j+1]
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								        add                 x11, x11, x7, lsl #1            // &src[j  ][i]
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								        add                 x12, x12, x7, lsl #1            // &src[j+1][i]
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								        ld1                 {v5.8H}, [x11]                  // read 8x16-bit @ src[j  ][i + {0..7}]: A,B,C,D,E,F,G,H
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								        ld1                 {v6.8H}, [x12]                  // read 8x16-bit @ src[j+1][i + {0..7}]: I,J,K,L,M,N,O,P
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								        ld1r                {v7.8H}, [x10], #2              // read 1x16-bit coeff X at filter[j  ] and duplicate across lanes
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								        ld1r                {v16.8H}, [x10], #2             // read 1x16-bit coeff Y at filter[j+1] and duplicate across lanes
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								        smlal               v3.4S, v5.4H, v7.4H             // val0 += {A,B,C,D} * X
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								        smlal2              v4.4S, v5.8H, v7.8H             // val1 += {E,F,G,H} * X
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								        smlal               v3.4S, v6.4H, v16.4H            // val0 += {I,J,K,L} * Y
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								        smlal2              v4.4S, v6.8H, v16.8H            // val1 += {M,N,O,P} * Y
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								        subs                w8, w8, #2                      // tmpfilterSize -= 2
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								        b.gt                3b                              // loop until filterSize consumed
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								        sqshrun             v3.4h, v3.4s, #16               // clip16(val0>>16)
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								        sqshrun2            v3.8h, v4.4s, #16               // clip16(val1>>16)
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								        uqshrn              v3.8b, v3.8h, #3                // clip8(val>>19)
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								        st1                 {v3.8b}, [x3], #8               // write to destination
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								        subs                w4, w4, #8                      // dstW -= 8
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								        add                 x7, x7, #8                      // i += 8
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								        b.gt                2b                              // loop until width consumed
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								        ret
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								endfunc
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