early-access version 1520
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yuzu emulator early access
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yuzu emulator early access
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=============
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=============
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This is the source code for early-access 1519.
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This is the source code for early-access 1520.
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## Legal Notice
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## Legal Notice
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@ -111,6 +111,8 @@ void UtilShaders::ASTCDecode(Image& image, const ImageBufferMap& map,
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glFlushMappedNamedBufferRange(map.buffer, map.offset, image.guest_size_bytes);
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glFlushMappedNamedBufferRange(map.buffer, map.offset, image.guest_size_bytes);
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glUniform2ui(1, tile_size.width, tile_size.height);
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glUniform2ui(1, tile_size.width, tile_size.height);
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// Ensure buffer data is valid before dispatching
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glFlush();
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for (const SwizzleParameters& swizzle : swizzles) {
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for (const SwizzleParameters& swizzle : swizzles) {
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const size_t input_offset = swizzle.buffer_offset + map.offset;
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const size_t input_offset = swizzle.buffer_offset + map.offset;
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const u32 num_dispatches_x = Common::DivCeil(swizzle.num_tiles.width, 32U);
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const u32 num_dispatches_x = Common::DivCeil(swizzle.num_tiles.width, 32U);
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@ -133,8 +135,6 @@ void UtilShaders::ASTCDecode(Image& image, const ImageBufferMap& map,
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glBindBufferRange(GL_SHADER_STORAGE_BUFFER, BINDING_INPUT_BUFFER, map.buffer, input_offset,
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glBindBufferRange(GL_SHADER_STORAGE_BUFFER, BINDING_INPUT_BUFFER, map.buffer, input_offset,
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image.guest_size_bytes - swizzle.buffer_offset);
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image.guest_size_bytes - swizzle.buffer_offset);
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// Ensure buffer data is valid before dispatching compute
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glFinish();
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glDispatchCompute(num_dispatches_x, num_dispatches_y, image.info.resources.layers);
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glDispatchCompute(num_dispatches_x, num_dispatches_y, image.info.resources.layers);
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}
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}
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program_manager.RestoreGuestCompute();
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program_manager.RestoreGuestCompute();
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@ -472,30 +472,33 @@ void ASTCDecoderPass::Assemble(Image& image, const StagingBufferRef& map,
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if (!data_buffer) {
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if (!data_buffer) {
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MakeDataBuffer();
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MakeDataBuffer();
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}
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}
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const VkPipeline vk_pipeline = *pipeline;
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const VkImageAspectFlags aspect_mask = image.AspectMask();
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const VkImageAspectFlags aspect_mask = image.AspectMask();
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const VkImage vk_image = image.Handle();
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const VkImage vk_image = image.Handle();
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const bool is_initialized = image.ExchangeInitialization();
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const bool is_initialized = image.ExchangeInitialization();
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scheduler.Record([vk_image, aspect_mask, is_initialized](vk::CommandBuffer cmdbuf) {
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scheduler.Record(
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const VkImageMemoryBarrier image_barrier{
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[vk_pipeline, vk_image, aspect_mask, is_initialized](vk::CommandBuffer cmdbuf) {
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.sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,
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const VkImageMemoryBarrier image_barrier{
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.pNext = nullptr,
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.sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER,
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.srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT,
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.pNext = nullptr,
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.dstAccessMask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT,
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.srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT,
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.oldLayout = is_initialized ? VK_IMAGE_LAYOUT_GENERAL : VK_IMAGE_LAYOUT_UNDEFINED,
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.dstAccessMask = VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT,
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.newLayout = VK_IMAGE_LAYOUT_GENERAL,
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.oldLayout = is_initialized ? VK_IMAGE_LAYOUT_GENERAL : VK_IMAGE_LAYOUT_UNDEFINED,
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.srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
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.newLayout = VK_IMAGE_LAYOUT_GENERAL,
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.dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
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.srcQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
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.image = vk_image,
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.dstQueueFamilyIndex = VK_QUEUE_FAMILY_IGNORED,
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.subresourceRange{
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.image = vk_image,
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.aspectMask = aspect_mask,
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.subresourceRange{
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.baseMipLevel = 0,
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.aspectMask = aspect_mask,
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.levelCount = VK_REMAINING_MIP_LEVELS,
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.baseMipLevel = 0,
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.baseArrayLayer = 0,
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.levelCount = VK_REMAINING_MIP_LEVELS,
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.layerCount = VK_REMAINING_ARRAY_LAYERS,
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.baseArrayLayer = 0,
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},
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.layerCount = VK_REMAINING_ARRAY_LAYERS,
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};
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},
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cmdbuf.PipelineBarrier(0, VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, 0, image_barrier);
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};
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});
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cmdbuf.PipelineBarrier(0, VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT, 0, image_barrier);
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cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_COMPUTE, vk_pipeline);
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});
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for (const VideoCommon::SwizzleParameters& swizzle : swizzles) {
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for (const VideoCommon::SwizzleParameters& swizzle : swizzles) {
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const size_t input_offset = swizzle.buffer_offset + map.offset;
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const size_t input_offset = swizzle.buffer_offset + map.offset;
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const u32 num_dispatches_x = Common::DivCeil(swizzle.num_tiles.width, 32U);
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const u32 num_dispatches_x = Common::DivCeil(swizzle.num_tiles.width, 32U);
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@ -522,14 +525,13 @@ void ASTCDecoderPass::Assemble(Image& image, const StagingBufferRef& map,
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const VkDescriptorSet set = CommitDescriptorSet(update_descriptor_queue);
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const VkDescriptorSet set = CommitDescriptorSet(update_descriptor_queue);
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const VkPipelineLayout vk_layout = *layout;
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const VkPipelineLayout vk_layout = *layout;
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const VkPipeline vk_pipeline = *pipeline;
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// To unswizzle the ASTC data
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// To unswizzle the ASTC data
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const auto params = MakeBlockLinearSwizzle2DParams(swizzle, image.info);
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const auto params = MakeBlockLinearSwizzle2DParams(swizzle, image.info);
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ASSERT(params.origin == (std::array<u32, 3>{0, 0, 0}));
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ASSERT(params.origin == (std::array<u32, 3>{0, 0, 0}));
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ASSERT(params.destination == (std::array<s32, 3>{0, 0, 0}));
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ASSERT(params.destination == (std::array<s32, 3>{0, 0, 0}));
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scheduler.Record([vk_layout, num_dispatches_x, num_dispatches_y, num_dispatches_z,
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scheduler.Record([vk_layout, vk_pipeline, num_dispatches_x, num_dispatches_y,
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block_dims, params, set](vk::CommandBuffer cmdbuf) {
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num_dispatches_z, block_dims, params, set](vk::CommandBuffer cmdbuf) {
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const AstcPushConstants uniforms{
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const AstcPushConstants uniforms{
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.blocks_dims = block_dims,
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.blocks_dims = block_dims,
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.bytes_per_block_log2 = params.bytes_per_block_log2,
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.bytes_per_block_log2 = params.bytes_per_block_log2,
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@ -539,7 +541,6 @@ void ASTCDecoderPass::Assemble(Image& image, const StagingBufferRef& map,
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.block_height = params.block_height,
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.block_height = params.block_height,
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.block_height_mask = params.block_height_mask,
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.block_height_mask = params.block_height_mask,
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};
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};
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cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_COMPUTE, vk_pipeline);
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cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_COMPUTE, vk_layout, 0, set, {});
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cmdbuf.BindDescriptorSets(VK_PIPELINE_BIND_POINT_COMPUTE, vk_layout, 0, set, {});
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cmdbuf.PushConstants(vk_layout, VK_SHADER_STAGE_COMPUTE_BIT, uniforms);
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cmdbuf.PushConstants(vk_layout, VK_SHADER_STAGE_COMPUTE_BIT, uniforms);
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cmdbuf.Dispatch(num_dispatches_x, num_dispatches_y, num_dispatches_z);
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cmdbuf.Dispatch(num_dispatches_x, num_dispatches_y, num_dispatches_z);
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@ -129,7 +129,4 @@ struct AstcBufferData {
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decltype(REPLICATE_BYTE_TO_16_TABLE) replicate_byte_to_16 = REPLICATE_BYTE_TO_16_TABLE;
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decltype(REPLICATE_BYTE_TO_16_TABLE) replicate_byte_to_16 = REPLICATE_BYTE_TO_16_TABLE;
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} constexpr ASTC_BUFFER_DATA;
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} constexpr ASTC_BUFFER_DATA;
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void Decompress(std::span<const uint8_t> data, uint32_t width, uint32_t height, uint32_t depth,
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uint32_t block_width, uint32_t block_height, std::span<uint8_t> output);
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} // namespace Tegra::Texture::ASTC
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} // namespace Tegra::Texture::ASTC
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