early-access version 4050
This commit is contained in:
@@ -32,13 +32,12 @@ H264::~H264() = default;
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std::span<const u8> H264::ComposeFrame(const Host1x::NvdecCommon::NvdecRegisters& state,
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size_t* out_configuration_size, bool is_first_frame) {
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H264DecoderContext context;
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host1x.MemoryManager().ReadBlock(state.picture_info_offset, &context,
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sizeof(H264DecoderContext));
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host1x.GMMU().ReadBlock(state.picture_info_offset, &context, sizeof(H264DecoderContext));
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const s64 frame_number = context.h264_parameter_set.frame_number.Value();
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if (!is_first_frame && frame_number != 0) {
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frame.resize_destructive(context.stream_len);
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host1x.MemoryManager().ReadBlock(state.frame_bitstream_offset, frame.data(), frame.size());
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host1x.GMMU().ReadBlock(state.frame_bitstream_offset, frame.data(), frame.size());
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*out_configuration_size = 0;
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return frame;
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}
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@@ -159,8 +158,8 @@ std::span<const u8> H264::ComposeFrame(const Host1x::NvdecCommon::NvdecRegisters
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std::memcpy(frame.data(), encoded_header.data(), encoded_header.size());
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*out_configuration_size = encoded_header.size();
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host1x.MemoryManager().ReadBlock(state.frame_bitstream_offset,
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frame.data() + encoded_header.size(), context.stream_len);
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host1x.GMMU().ReadBlock(state.frame_bitstream_offset, frame.data() + encoded_header.size(),
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context.stream_len);
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return frame;
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}
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@@ -14,7 +14,7 @@ VP8::~VP8() = default;
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std::span<const u8> VP8::ComposeFrame(const Host1x::NvdecCommon::NvdecRegisters& state) {
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VP8PictureInfo info;
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host1x.MemoryManager().ReadBlock(state.picture_info_offset, &info, sizeof(VP8PictureInfo));
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host1x.GMMU().ReadBlock(state.picture_info_offset, &info, sizeof(VP8PictureInfo));
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const bool is_key_frame = info.key_frame == 1u;
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const auto bitstream_size = static_cast<size_t>(info.vld_buffer_size);
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@@ -45,7 +45,7 @@ std::span<const u8> VP8::ComposeFrame(const Host1x::NvdecCommon::NvdecRegisters&
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frame[9] = static_cast<u8>(((info.frame_height >> 8) & 0x3f));
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}
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const u64 bitstream_offset = state.frame_bitstream_offset;
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host1x.MemoryManager().ReadBlock(bitstream_offset, frame.data() + header_size, bitstream_size);
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host1x.GMMU().ReadBlock(bitstream_offset, frame.data() + header_size, bitstream_size);
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return frame;
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}
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@@ -358,7 +358,7 @@ void VP9::WriteMvProbabilityUpdate(VpxRangeEncoder& writer, u8 new_prob, u8 old_
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Vp9PictureInfo VP9::GetVp9PictureInfo(const Host1x::NvdecCommon::NvdecRegisters& state) {
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PictureInfo picture_info;
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host1x.MemoryManager().ReadBlock(state.picture_info_offset, &picture_info, sizeof(PictureInfo));
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host1x.GMMU().ReadBlock(state.picture_info_offset, &picture_info, sizeof(PictureInfo));
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Vp9PictureInfo vp9_info = picture_info.Convert();
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InsertEntropy(state.vp9_entropy_probs_offset, vp9_info.entropy);
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@@ -373,7 +373,7 @@ Vp9PictureInfo VP9::GetVp9PictureInfo(const Host1x::NvdecCommon::NvdecRegisters&
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void VP9::InsertEntropy(u64 offset, Vp9EntropyProbs& dst) {
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EntropyProbs entropy;
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host1x.MemoryManager().ReadBlock(offset, &entropy, sizeof(EntropyProbs));
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host1x.GMMU().ReadBlock(offset, &entropy, sizeof(EntropyProbs));
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entropy.Convert(dst);
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}
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@@ -383,9 +383,8 @@ Vp9FrameContainer VP9::GetCurrentFrame(const Host1x::NvdecCommon::NvdecRegisters
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// gpu.SyncGuestHost(); epic, why?
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current_frame.info = GetVp9PictureInfo(state);
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current_frame.bit_stream.resize(current_frame.info.bitstream_size);
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host1x.MemoryManager().ReadBlock(state.frame_bitstream_offset,
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current_frame.bit_stream.data(),
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current_frame.info.bitstream_size);
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host1x.GMMU().ReadBlock(state.frame_bitstream_offset, current_frame.bit_stream.data(),
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current_frame.info.bitstream_size);
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}
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if (!next_frame.bit_stream.empty()) {
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Vp9FrameContainer temp{
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32
src/video_core/host1x/gpu_device_memory_manager.cpp
Executable file
32
src/video_core/host1x/gpu_device_memory_manager.cpp
Executable file
@@ -0,0 +1,32 @@
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// SPDX-FileCopyrightText: 2023 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "core/device_memory_manager.inc"
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#include "video_core/host1x/gpu_device_memory_manager.h"
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#include "video_core/rasterizer_interface.h"
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namespace Tegra {
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struct MaxwellDeviceMethods {
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static inline void MarkRegionCaching(Core::Memory::Memory* interface, VAddr address,
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size_t size, bool caching) {
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interface->RasterizerMarkRegionCached(address, size, caching);
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}
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};
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} // namespace Tegra
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template struct Core::DeviceMemoryManagerAllocator<Tegra::MaxwellDeviceTraits>;
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template class Core::DeviceMemoryManager<Tegra::MaxwellDeviceTraits>;
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template const u8* Tegra::MaxwellDeviceMemoryManager::GetPointer<u8>(DAddr addr) const;
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template u8* Tegra::MaxwellDeviceMemoryManager::GetPointer<u8>(DAddr addr);
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template u8 Tegra::MaxwellDeviceMemoryManager::Read<u8>(DAddr addr) const;
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template u16 Tegra::MaxwellDeviceMemoryManager::Read<u16>(DAddr addr) const;
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template u32 Tegra::MaxwellDeviceMemoryManager::Read<u32>(DAddr addr) const;
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template u64 Tegra::MaxwellDeviceMemoryManager::Read<u64>(DAddr addr) const;
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template void Tegra::MaxwellDeviceMemoryManager::Write<u8>(DAddr addr, u8 data);
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template void Tegra::MaxwellDeviceMemoryManager::Write<u16>(DAddr addr, u16 data);
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template void Tegra::MaxwellDeviceMemoryManager::Write<u32>(DAddr addr, u32 data);
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template void Tegra::MaxwellDeviceMemoryManager::Write<u64>(DAddr addr, u64 data);
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24
src/video_core/host1x/gpu_device_memory_manager.h
Executable file
24
src/video_core/host1x/gpu_device_memory_manager.h
Executable file
@@ -0,0 +1,24 @@
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// SPDX-FileCopyrightText: 2023 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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#include "core/device_memory_manager.h"
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namespace VideoCore {
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class RasterizerInterface;
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}
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namespace Tegra {
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struct MaxwellDeviceMethods;
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struct MaxwellDeviceTraits {
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static constexpr size_t device_virtual_bits = 34;
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using DeviceInterface = typename VideoCore::RasterizerInterface;
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using DeviceMethods = MaxwellDeviceMethods;
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};
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using MaxwellDeviceMemoryManager = Core::DeviceMemoryManager<MaxwellDeviceTraits>;
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} // namespace Tegra
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@@ -9,9 +9,12 @@ namespace Tegra {
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namespace Host1x {
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Host1x::Host1x(Core::System& system_)
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: system{system_}, syncpoint_manager{}, memory_manager{system, 32, 12},
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: system{system_}, syncpoint_manager{},
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memory_manager(system.DeviceMemory()), gmmu_manager{system, memory_manager, 32, 12},
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allocator{std::make_unique<Common::FlatAllocator<u32, 0, 32>>(1 << 12)} {}
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Host1x::~Host1x() = default;
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} // namespace Host1x
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} // namespace Tegra
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@@ -6,6 +6,7 @@
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#include "common/common_types.h"
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#include "common/address_space.h"
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#include "video_core/host1x/gpu_device_memory_manager.h"
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#include "video_core/host1x/syncpoint_manager.h"
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#include "video_core/memory_manager.h"
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@@ -20,6 +21,7 @@ namespace Host1x {
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class Host1x {
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public:
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explicit Host1x(Core::System& system);
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~Host1x();
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SyncpointManager& GetSyncpointManager() {
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return syncpoint_manager;
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@@ -29,14 +31,22 @@ public:
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return syncpoint_manager;
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}
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Tegra::MemoryManager& MemoryManager() {
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Tegra::MaxwellDeviceMemoryManager& MemoryManager() {
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return memory_manager;
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}
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const Tegra::MemoryManager& MemoryManager() const {
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const Tegra::MaxwellDeviceMemoryManager& MemoryManager() const {
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return memory_manager;
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}
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Tegra::MemoryManager& GMMU() {
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return gmmu_manager;
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}
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const Tegra::MemoryManager& GMMU() const {
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return gmmu_manager;
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}
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Common::FlatAllocator<u32, 0, 32>& Allocator() {
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return *allocator;
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}
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@@ -48,7 +58,8 @@ public:
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private:
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Core::System& system;
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SyncpointManager syncpoint_manager;
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Tegra::MemoryManager memory_manager;
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Tegra::MaxwellDeviceMemoryManager memory_manager;
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Tegra::MemoryManager gmmu_manager;
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std::unique_ptr<Common::FlatAllocator<u32, 0, 32>> allocator;
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};
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@@ -81,7 +81,7 @@ void Vic::Execute() {
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LOG_ERROR(Service_NVDRV, "VIC Luma address not set.");
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return;
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}
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const VicConfig config{host1x.MemoryManager().Read<u64>(config_struct_address + 0x20)};
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const VicConfig config{host1x.GMMU().Read<u64>(config_struct_address + 0x20)};
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auto frame = nvdec_processor->GetFrame();
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if (!frame) {
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return;
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@@ -162,12 +162,12 @@ void Vic::WriteRGBFrame(std::unique_ptr<FFmpeg::Frame> frame, const VicConfig& c
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Texture::SwizzleSubrect(luma_buffer, frame_buff, 4, width, height, 1, 0, 0, width, height,
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block_height, 0, width * 4);
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host1x.MemoryManager().WriteBlock(output_surface_luma_address, luma_buffer.data(), size);
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host1x.GMMU().WriteBlock(output_surface_luma_address, luma_buffer.data(), size);
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} else {
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// send pitch linear frame
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const size_t linear_size = width * height * 4;
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host1x.MemoryManager().WriteBlock(output_surface_luma_address, converted_frame_buf_addr,
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linear_size);
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host1x.GMMU().WriteBlock(output_surface_luma_address, converted_frame_buf_addr,
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linear_size);
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}
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}
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@@ -193,8 +193,7 @@ void Vic::WriteYUVFrame(std::unique_ptr<FFmpeg::Frame> frame, const VicConfig& c
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const std::size_t dst = y * aligned_width;
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std::memcpy(luma_buffer.data() + dst, luma_src + src, frame_width);
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}
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host1x.MemoryManager().WriteBlock(output_surface_luma_address, luma_buffer.data(),
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luma_buffer.size());
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host1x.GMMU().WriteBlock(output_surface_luma_address, luma_buffer.data(), luma_buffer.size());
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// Chroma
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const std::size_t half_height = frame_height / 2;
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@@ -233,8 +232,8 @@ void Vic::WriteYUVFrame(std::unique_ptr<FFmpeg::Frame> frame, const VicConfig& c
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ASSERT(false);
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break;
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}
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host1x.MemoryManager().WriteBlock(output_surface_chroma_address, chroma_buffer.data(),
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chroma_buffer.size());
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host1x.GMMU().WriteBlock(output_surface_chroma_address, chroma_buffer.data(),
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chroma_buffer.size());
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}
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} // namespace Host1x
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