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early-access version 2596

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pineappleEA 2022-03-24 03:40:39 +01:00
parent d7301c48b1
commit 73b4c61bdd
8 changed files with 5 additions and 113 deletions
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2
README.md
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@ -1,7 +1,7 @@
yuzu emulator early access
=============
This is the source code for early-access 2595.
This is the source code for early-access 2596.
## Legal Notice

2
src/core/memory.cpp
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@ -322,7 +322,7 @@ struct Memory::Impl {
}
if (Settings::IsFastmemEnabled()) {
const bool is_read_enable = !Settings::IsGPULevelExtreme() || !cached;
const bool is_read_enable = Settings::IsGPULevelHigh() || !cached;
system.DeviceMemory().buffer.Protect(vaddr, size, is_read_enable, !cached);
}

2
src/shader_recompiler/frontend/ir/microinstruction.cpp
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@ -327,7 +327,7 @@ void Inst::AddPhiOperand(Block* predecessor, const Value& value) {
}
void Inst::ErasePhiOperand(size_t index) {
const auto operand_it{phi_args.begin() + static_cast<u32>(index)};
const auto operand_it{phi_args.begin() + static_cast<ptrdiff_t>(index)};
phi_args.erase(operand_it);
}

3
src/video_core/buffer_cache/buffer_base.h
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@ -212,7 +212,7 @@ public:
void FlushCachedWrites() noexcept {
flags &= ~BufferFlagBits::CachedWrites;
const u64 num_words = NumWords();
const u64* const cached_words = Array<Type::CachedCPU>();
u64* const cached_words = Array<Type::CachedCPU>();
u64* const untracked_words = Array<Type::Untracked>();
u64* const cpu_words = Array<Type::CPU>();
for (u64 word_index = 0; word_index < num_words; ++word_index) {
@ -220,6 +220,7 @@ public:
NotifyRasterizer<false>(word_index, untracked_words[word_index], cached_bits);
untracked_words[word_index] |= cached_bits;
cpu_words[word_index] |= cached_bits;
cached_words[word_index] = 0;
}
}

75
src/video_core/engines/maxwell_3d.cpp
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@ -2,13 +2,9 @@
// Licensed under GPLv2 or any later version
// Refer to the license.txt file included.
#include <algorithm>
#include <cstring>
#include <optional>
#include "common/alignment.h"
#include "common/assert.h"
#include "common/settings.h"
#include "core/core.h"
#include "core/core_timing.h"
#include "video_core/dirty_flags.h"
@ -30,7 +26,6 @@ Maxwell3D::Maxwell3D(Core::System& system_, MemoryManager& memory_manager_)
upload_state{memory_manager, regs.upload} {
dirty.flags.flip();
InitializeRegisterDefaults();
accelerated_reads = Settings::IsFastmemEnabled();
}
Maxwell3D::~Maxwell3D() = default;
@ -218,9 +213,6 @@ void Maxwell3D::ProcessMethodCall(u32 method, u32 argument, u32 nonshadow_argume
regs.index_array.count = regs.small_index.count;
regs.index_array.first = regs.small_index.first;
dirty.flags[VideoCommon::Dirty::IndexBuffer] = true;
if (!Settings::IsGPULevelExtreme()) {
RecalculateVertexArrayLimit();
}
return DrawArrays();
case MAXWELL3D_REG_INDEX(topology_override):
use_topology_override = true;
@ -675,71 +667,4 @@ void Maxwell3D::ProcessClearBuffers() {
rasterizer->Clear();
}
void Maxwell3D::RecalculateVertexArrayLimit() {
GPUVAddr start_address = regs.index_array.StartAddress();
auto& vn_state = vertex_num_approx_state;
if (start_address != vn_state.last_index_array_start ||
vn_state.current_min_index != regs.index_array.first) {
vn_state.last_index_array_start = start_address;
vn_state.current_max_index = regs.index_array.first;
vn_state.current_min_index = regs.index_array.first;
vn_state.current_num_vertices = 0;
}
const u32 index_count = regs.index_array.first + regs.index_array.count;
if (index_count <= vn_state.current_max_index) {
return;
}
const u32 max_base = std::max(regs.index_array.first, vn_state.current_max_index);
const u32 num_indices = index_count - max_base;
const size_t size_index = regs.index_array.FormatSizeInBytes();
const size_t expected_size = num_indices * size_index;
const size_t offset = max_base * size_index;
auto maybe_ptr = memory_manager.GpuToHostPointer(start_address + offset);
u8* ptr;
if (accelerated_reads && maybe_ptr) {
ptr = *maybe_ptr;
} else {
vn_state.index_buffer_cache.resize(Common::DivideUp(expected_size, sizeof(u32)));
ptr = reinterpret_cast<u8*>(vn_state.index_buffer_cache.data());
memory_manager.ReadBlockUnsafe(start_address + offset, ptr, expected_size);
}
vn_state.current_max_index = index_count;
u32 new_num_vertices{};
switch (regs.index_array.format) {
case Regs::IndexFormat::UnsignedByte: {
std::span<const u8> span{ptr, num_indices};
const auto max = std::max_element(span.begin(), span.end());
new_num_vertices = *max + 1;
break;
}
case Regs::IndexFormat::UnsignedShort: {
std::span<const u16> span{reinterpret_cast<const u16*>(ptr), num_indices};
const auto max = std::max_element(span.begin(), span.end());
new_num_vertices = *max + 1;
break;
}
case Regs::IndexFormat::UnsignedInt: {
std::span<const u32> span{reinterpret_cast<const u32*>(ptr), num_indices};
const auto max = std::max_element(span.begin(), span.end());
new_num_vertices = *max + 1;
break;
}
}
if (new_num_vertices > vn_state.current_num_vertices) {
vn_state.current_num_vertices = new_num_vertices;
for (size_t i = 0; i < Regs::NumVertexArrays; i++) {
if (!regs.vertex_array[i].enable) {
continue;
}
const u32 stride = regs.vertex_array[i].stride;
const GPUVAddr gpu_addr_begin = regs.vertex_array[i].StartAddress();
const GPUVAddr gpu_addr_end = gpu_addr_begin + new_num_vertices * stride - 1;
regs.vertex_array_limit[i].SetAddress(gpu_addr_end);
dirty.flags[VideoCommon::Dirty::VertexBuffer0 + i] = true;
}
}
}
} // namespace Tegra::Engines

18
src/video_core/engines/maxwell_3d.h
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@ -1348,12 +1348,6 @@ public:
return static_cast<GPUVAddr>((static_cast<GPUVAddr>(limit_high) << 32) |
limit_low);
}
void SetAddress(GPUVAddr address) {
limit_low = static_cast<u32>(address);
limit_high = static_cast<u32>(address >> 32);
}
} vertex_array_limit[NumVertexArrays];
struct {
@ -1497,16 +1491,6 @@ public:
Tables tables{};
} dirty;
struct VertexNumApproxState {
GPUVAddr last_index_array_start;
u32 current_max_index;
u32 current_min_index;
u32 current_num_vertices;
std::vector<u32> index_buffer_cache;
} vertex_num_approx_state;
bool accelerated_reads{};
private:
void InitializeRegisterDefaults();
@ -1575,8 +1559,6 @@ private:
// Handles a instance drawcall from MME
void StepInstance(MMEDrawMode expected_mode, u32 count);
void RecalculateVertexArrayLimit();
/// Returns a query's value or an empty object if the value will be deferred through a cache.
std::optional<u64> GetQueryResult();

14
src/video_core/memory_manager.cpp
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@ -6,7 +6,6 @@
#include "common/alignment.h"
#include "common/assert.h"
#include "common/host_memory.h"
#include "common/logging/log.h"
#include "core/core.h"
#include "core/hle/kernel/k_page_table.h"
@ -186,19 +185,6 @@ std::optional<VAddr> MemoryManager::GpuToCpuAddress(GPUVAddr gpu_addr) const {
return page_entry.ToAddress() + (gpu_addr & page_mask);
}
std::optional<u8*> MemoryManager::GpuToHostPointer(GPUVAddr gpu_addr) const {
auto cpu_addr = GpuToCpuAddress(gpu_addr);
if (!cpu_addr) {
return std::nullopt;
}
auto& device_memory = system.DeviceMemory();
auto base = device_memory.buffer.VirtualBasePointer();
if (!base) {
return std::nullopt;
}
return base + *cpu_addr;
}
std::optional<VAddr> MemoryManager::GpuToCpuAddress(GPUVAddr addr, std::size_t size) const {
size_t page_index{addr >> page_bits};
const size_t page_last{(addr + size + page_size - 1) >> page_bits};

2
src/video_core/memory_manager.h
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@ -76,8 +76,6 @@ public:
[[nodiscard]] std::optional<VAddr> GpuToCpuAddress(GPUVAddr addr) const;
[[nodiscard]] std::optional<u8*> GpuToHostPointer(GPUVAddr addr) const;
[[nodiscard]] std::optional<VAddr> GpuToCpuAddress(GPUVAddr addr, std::size_t size) const;
template <typename T>