early-access version 1255

2020-12-28 15:15:37 +00:00
parent 84b39492d1
commit 78b48028e1
6254 changed files with 1868140 additions and 0 deletions
--- a/externals/dynarmic/src/backend/x64/a64_emit_x64.h
+++ b/externals/dynarmic/src/backend/x64/a64_emit_x64.h
@@ -0,0 +1,126 @@
+/* This file is part of the dynarmic project.
+ * Copyright (c) 2016 MerryMage
+ * SPDX-License-Identifier: 0BSD
+ */
+
+#pragma once
+
+#include <array>
+#include <map>
+#include <tuple>
+
+#include <dynarmic/A64/a64.h>
+#include <dynarmic/A64/config.h>
+
+#include "backend/x64/a64_jitstate.h"
+#include "backend/x64/block_range_information.h"
+#include "backend/x64/emit_x64.h"
+#include "frontend/A64/location_descriptor.h"
+#include "frontend/ir/terminal.h"
+
+namespace Dynarmic::Backend::X64 {
+
+class RegAlloc;
+
+struct A64EmitContext final : public EmitContext {
+    A64EmitContext(const A64::UserConfig& conf, RegAlloc& reg_alloc, IR::Block& block);
+
+    A64::LocationDescriptor Location() const;
+    bool IsSingleStep() const;
+    FP::FPCR FPCR(bool fpcr_controlled = true) const override;
+
+    bool HasOptimization(OptimizationFlag flag) const override {
+        return conf.HasOptimization(flag);
+    }
+
+    const A64::UserConfig& conf;
+};
+
+class A64EmitX64 final : public EmitX64 {
+public:
+    A64EmitX64(BlockOfCode& code, A64::UserConfig conf, A64::Jit* jit_interface);
+    ~A64EmitX64() override;
+
+    /**
+     * Emit host machine code for a basic block with intermediate representation `block`.
+     * @note block is modified.
+     */
+    BlockDescriptor Emit(IR::Block& block);
+
+    void ClearCache() override;
+
+    void InvalidateCacheRanges(const boost::icl::interval_set<u64>& ranges);
+
+    void ChangeProcessorID(size_t value) {
+        conf.processor_id = value;
+    }
+
+protected:
+    A64::UserConfig conf;
+    A64::Jit* jit_interface;
+    BlockRangeInformation<u64> block_ranges;
+
+    struct FastDispatchEntry {
+        u64 location_descriptor = 0xFFFF'FFFF'FFFF'FFFFull;
+        const void* code_ptr = nullptr;
+    };
+    static_assert(sizeof(FastDispatchEntry) == 0x10);
+    static constexpr u64 fast_dispatch_table_mask = 0xFFFFF0;
+    static constexpr size_t fast_dispatch_table_size = 0x100000;
+    std::array<FastDispatchEntry, fast_dispatch_table_size> fast_dispatch_table;
+    void ClearFastDispatchTable();
+
+    void (*memory_read_128)();
+    void (*memory_write_128)();
+    void GenMemory128Accessors();
+
+    std::map<std::tuple<size_t, int, int>, void(*)()> read_fallbacks;
+    std::map<std::tuple<size_t, int, int>, void(*)()> write_fallbacks;
+    void GenFastmemFallbacks();
+
+    const void* terminal_handler_pop_rsb_hint;
+    const void* terminal_handler_fast_dispatch_hint = nullptr;
+    FastDispatchEntry& (*fast_dispatch_table_lookup)(u64) = nullptr;
+    void GenTerminalHandlers();
+
+    template<std::size_t bitsize>
+    void EmitDirectPageTableMemoryRead(A64EmitContext& ctx, IR::Inst* inst);
+    template<std::size_t bitsize>
+    void EmitDirectPageTableMemoryWrite(A64EmitContext& ctx, IR::Inst* inst);
+    template<std::size_t bitsize, auto callback>
+    void EmitExclusiveReadMemory(A64EmitContext& ctx, IR::Inst* inst);
+    template<std::size_t bitsize, auto callback>
+    void EmitExclusiveWriteMemory(A64EmitContext& ctx, IR::Inst* inst);
+
+    // Microinstruction emitters
+    void EmitPushRSB(EmitContext& ctx, IR::Inst* inst);
+#define OPCODE(...)
+#define A32OPC(...)
+#define A64OPC(name, type, ...) void EmitA64##name(A64EmitContext& ctx, IR::Inst* inst);
+#include "frontend/ir/opcodes.inc"
+#undef OPCODE
+#undef A32OPC
+#undef A64OPC
+
+    // Helpers
+    std::string LocationDescriptorToFriendlyName(const IR::LocationDescriptor&) const override;
+
+    // Terminal instruction emitters
+    void EmitTerminalImpl(IR::Term::Interpret terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
+    void EmitTerminalImpl(IR::Term::ReturnToDispatch terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
+    void EmitTerminalImpl(IR::Term::LinkBlock terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
+    void EmitTerminalImpl(IR::Term::LinkBlockFast terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
+    void EmitTerminalImpl(IR::Term::PopRSBHint terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
+    void EmitTerminalImpl(IR::Term::FastDispatchHint terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
+    void EmitTerminalImpl(IR::Term::If terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
+    void EmitTerminalImpl(IR::Term::CheckBit terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
+    void EmitTerminalImpl(IR::Term::CheckHalt terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
+
+    // Patching
+    void Unpatch(const IR::LocationDescriptor& target_desc) override;
+    void EmitPatchJg(const IR::LocationDescriptor& target_desc, CodePtr target_code_ptr = nullptr) override;
+    void EmitPatchJmp(const IR::LocationDescriptor& target_desc, CodePtr target_code_ptr = nullptr) override;
+    void EmitPatchMovRcx(CodePtr target_code_ptr = nullptr) override;
+};
+
+} // namespace Dynarmic::Backend::X64