another try
This commit is contained in:
@@ -1,79 +1,79 @@
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// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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#include <vector>
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#include "common/common_types.h"
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#include "core/hle/service/nvdrv/nvdata.h"
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namespace Core {
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class System;
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}
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namespace Kernel {
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class KEvent;
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}
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namespace Service::Nvidia::Devices {
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/// Represents an abstract nvidia device node. It is to be subclassed by concrete device nodes to
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/// implement the ioctl interface.
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class nvdevice {
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public:
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explicit nvdevice(Core::System& system_) : system{system_} {}
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virtual ~nvdevice() = default;
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/**
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* Handles an ioctl1 request.
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* @param command The ioctl command id.
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* @param input A buffer containing the input data for the ioctl.
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* @param output A buffer where the output data will be written to.
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* @returns The result code of the ioctl.
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*/
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virtual NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
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std::vector<u8>& output) = 0;
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/**
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* Handles an ioctl2 request.
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* @param command The ioctl command id.
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* @param input A buffer containing the input data for the ioctl.
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* @param inline_input A buffer containing the input data for the ioctl which has been inlined.
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* @param output A buffer where the output data will be written to.
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* @returns The result code of the ioctl.
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*/
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virtual NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
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const std::vector<u8>& inline_input, std::vector<u8>& output) = 0;
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/**
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* Handles an ioctl3 request.
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* @param command The ioctl command id.
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* @param input A buffer containing the input data for the ioctl.
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* @param output A buffer where the output data will be written to.
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* @param inline_output A buffer where the inlined output data will be written to.
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* @returns The result code of the ioctl.
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*/
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virtual NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
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std::vector<u8>& output, std::vector<u8>& inline_output) = 0;
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/**
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* Called once a device is openned
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* @param fd The device fd
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*/
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virtual void OnOpen(DeviceFD fd) = 0;
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/**
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* Called once a device is closed
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* @param fd The device fd
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*/
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virtual void OnClose(DeviceFD fd) = 0;
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virtual Kernel::KEvent* QueryEvent(u32 event_id) {
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return nullptr;
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}
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protected:
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Core::System& system;
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};
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} // namespace Service::Nvidia::Devices
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// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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#include <vector>
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#include "common/common_types.h"
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#include "core/hle/service/nvdrv/nvdata.h"
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namespace Core {
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class System;
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}
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namespace Kernel {
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class KEvent;
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}
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namespace Service::Nvidia::Devices {
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/// Represents an abstract nvidia device node. It is to be subclassed by concrete device nodes to
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/// implement the ioctl interface.
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class nvdevice {
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public:
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explicit nvdevice(Core::System& system_) : system{system_} {}
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virtual ~nvdevice() = default;
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/**
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* Handles an ioctl1 request.
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* @param command The ioctl command id.
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* @param input A buffer containing the input data for the ioctl.
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* @param output A buffer where the output data will be written to.
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* @returns The result code of the ioctl.
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*/
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virtual NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
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std::vector<u8>& output) = 0;
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/**
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* Handles an ioctl2 request.
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* @param command The ioctl command id.
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* @param input A buffer containing the input data for the ioctl.
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* @param inline_input A buffer containing the input data for the ioctl which has been inlined.
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* @param output A buffer where the output data will be written to.
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* @returns The result code of the ioctl.
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*/
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virtual NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
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const std::vector<u8>& inline_input, std::vector<u8>& output) = 0;
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/**
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* Handles an ioctl3 request.
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* @param command The ioctl command id.
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* @param input A buffer containing the input data for the ioctl.
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* @param output A buffer where the output data will be written to.
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* @param inline_output A buffer where the inlined output data will be written to.
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* @returns The result code of the ioctl.
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*/
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virtual NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
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std::vector<u8>& output, std::vector<u8>& inline_output) = 0;
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/**
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* Called once a device is openned
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* @param fd The device fd
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*/
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virtual void OnOpen(DeviceFD fd) = 0;
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/**
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* Called once a device is closed
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* @param fd The device fd
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*/
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virtual void OnClose(DeviceFD fd) = 0;
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virtual Kernel::KEvent* QueryEvent(u32 event_id) {
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return nullptr;
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}
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protected:
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Core::System& system;
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};
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} // namespace Service::Nvidia::Devices
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@@ -1,64 +1,64 @@
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// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "common/assert.h"
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#include "common/logging/log.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/hle/service/nvdrv/core/container.h"
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#include "core/hle/service/nvdrv/core/nvmap.h"
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#include "core/hle/service/nvdrv/devices/nvdisp_disp0.h"
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#include "core/perf_stats.h"
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#include "video_core/gpu.h"
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namespace Service::Nvidia::Devices {
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nvdisp_disp0::nvdisp_disp0(Core::System& system_, NvCore::Container& core)
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: nvdevice{system_}, container{core}, nvmap{core.GetNvMapFile()} {}
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nvdisp_disp0::~nvdisp_disp0() = default;
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NvResult nvdisp_disp0::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
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std::vector<u8>& output) {
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UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
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return NvResult::NotImplemented;
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}
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NvResult nvdisp_disp0::Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
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const std::vector<u8>& inline_input, std::vector<u8>& output) {
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UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
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return NvResult::NotImplemented;
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}
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NvResult nvdisp_disp0::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
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std::vector<u8>& output, std::vector<u8>& inline_output) {
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UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
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return NvResult::NotImplemented;
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}
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void nvdisp_disp0::OnOpen(DeviceFD fd) {}
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void nvdisp_disp0::OnClose(DeviceFD fd) {}
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void nvdisp_disp0::flip(u32 buffer_handle, u32 offset, android::PixelFormat format, u32 width,
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u32 height, u32 stride, android::BufferTransformFlags transform,
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const Common::Rectangle<int>& crop_rect,
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std::array<Service::Nvidia::NvFence, 4>& fences, u32 num_fences) {
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const VAddr addr = nvmap.GetHandleAddress(buffer_handle);
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LOG_TRACE(Service,
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"Drawing from address {:X} offset {:08X} Width {} Height {} Stride {} Format {}",
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addr, offset, width, height, stride, format);
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const Tegra::FramebufferConfig framebuffer{addr, offset, width, height,
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stride, format, transform, crop_rect};
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system.GPU().RequestSwapBuffers(&framebuffer, fences, num_fences);
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system.GetPerfStats().EndSystemFrame();
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system.SpeedLimiter().DoSpeedLimiting(system.CoreTiming().GetGlobalTimeUs());
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system.GetPerfStats().BeginSystemFrame();
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}
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Kernel::KEvent* nvdisp_disp0::QueryEvent(u32 event_id) {
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LOG_CRITICAL(Service_NVDRV, "Unknown DISP Event {}", event_id);
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return nullptr;
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}
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} // namespace Service::Nvidia::Devices
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// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "common/assert.h"
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#include "common/logging/log.h"
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#include "core/core.h"
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#include "core/core_timing.h"
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#include "core/hle/service/nvdrv/core/container.h"
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#include "core/hle/service/nvdrv/core/nvmap.h"
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#include "core/hle/service/nvdrv/devices/nvdisp_disp0.h"
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#include "core/perf_stats.h"
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#include "video_core/gpu.h"
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namespace Service::Nvidia::Devices {
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nvdisp_disp0::nvdisp_disp0(Core::System& system_, NvCore::Container& core)
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: nvdevice{system_}, container{core}, nvmap{core.GetNvMapFile()} {}
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nvdisp_disp0::~nvdisp_disp0() = default;
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NvResult nvdisp_disp0::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
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std::vector<u8>& output) {
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UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
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return NvResult::NotImplemented;
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}
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NvResult nvdisp_disp0::Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
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const std::vector<u8>& inline_input, std::vector<u8>& output) {
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UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
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return NvResult::NotImplemented;
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}
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NvResult nvdisp_disp0::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
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std::vector<u8>& output, std::vector<u8>& inline_output) {
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UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
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return NvResult::NotImplemented;
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}
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void nvdisp_disp0::OnOpen(DeviceFD fd) {}
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void nvdisp_disp0::OnClose(DeviceFD fd) {}
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void nvdisp_disp0::flip(u32 buffer_handle, u32 offset, android::PixelFormat format, u32 width,
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u32 height, u32 stride, android::BufferTransformFlags transform,
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const Common::Rectangle<int>& crop_rect,
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std::array<Service::Nvidia::NvFence, 4>& fences, u32 num_fences) {
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const VAddr addr = nvmap.GetHandleAddress(buffer_handle);
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LOG_TRACE(Service,
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"Drawing from address {:X} offset {:08X} Width {} Height {} Stride {} Format {}",
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addr, offset, width, height, stride, format);
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const Tegra::FramebufferConfig framebuffer{addr, offset, width, height,
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stride, format, transform, crop_rect};
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system.GPU().RequestSwapBuffers(&framebuffer, fences, num_fences);
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system.GetPerfStats().EndSystemFrame();
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system.SpeedLimiter().DoSpeedLimiting(system.CoreTiming().GetGlobalTimeUs());
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system.GetPerfStats().BeginSystemFrame();
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}
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Kernel::KEvent* nvdisp_disp0::QueryEvent(u32 event_id) {
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LOG_CRITICAL(Service_NVDRV, "Unknown DISP Event {}", event_id);
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return nullptr;
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}
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} // namespace Service::Nvidia::Devices
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@@ -1,51 +1,51 @@
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// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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|
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#include <memory>
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#include <vector>
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#include "common/common_types.h"
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#include "common/math_util.h"
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#include "core/hle/service/nvdrv/devices/nvdevice.h"
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#include "core/hle/service/nvflinger/buffer_transform_flags.h"
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#include "core/hle/service/nvflinger/pixel_format.h"
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namespace Service::Nvidia::NvCore {
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class Container;
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class NvMap;
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} // namespace Service::Nvidia::NvCore
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namespace Service::Nvidia::Devices {
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class nvmap;
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class nvdisp_disp0 final : public nvdevice {
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public:
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explicit nvdisp_disp0(Core::System& system_, NvCore::Container& core);
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~nvdisp_disp0() override;
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NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
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std::vector<u8>& output) override;
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NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
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const std::vector<u8>& inline_input, std::vector<u8>& output) override;
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NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
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std::vector<u8>& output, std::vector<u8>& inline_output) override;
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void OnOpen(DeviceFD fd) override;
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void OnClose(DeviceFD fd) override;
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/// Performs a screen flip, drawing the buffer pointed to by the handle.
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void flip(u32 buffer_handle, u32 offset, android::PixelFormat format, u32 width, u32 height,
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u32 stride, android::BufferTransformFlags transform,
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const Common::Rectangle<int>& crop_rect,
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std::array<Service::Nvidia::NvFence, 4>& fences, u32 num_fences);
|
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|
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Kernel::KEvent* QueryEvent(u32 event_id) override;
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|
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private:
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NvCore::Container& container;
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NvCore::NvMap& nvmap;
|
||||
};
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <memory>
|
||||
#include <vector>
|
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#include "common/common_types.h"
|
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#include "common/math_util.h"
|
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#include "core/hle/service/nvdrv/devices/nvdevice.h"
|
||||
#include "core/hle/service/nvflinger/buffer_transform_flags.h"
|
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#include "core/hle/service/nvflinger/pixel_format.h"
|
||||
|
||||
namespace Service::Nvidia::NvCore {
|
||||
class Container;
|
||||
class NvMap;
|
||||
} // namespace Service::Nvidia::NvCore
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
class nvmap;
|
||||
|
||||
class nvdisp_disp0 final : public nvdevice {
|
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public:
|
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explicit nvdisp_disp0(Core::System& system_, NvCore::Container& core);
|
||||
~nvdisp_disp0() override;
|
||||
|
||||
NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) override;
|
||||
NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) override;
|
||||
NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) override;
|
||||
|
||||
void OnOpen(DeviceFD fd) override;
|
||||
void OnClose(DeviceFD fd) override;
|
||||
|
||||
/// Performs a screen flip, drawing the buffer pointed to by the handle.
|
||||
void flip(u32 buffer_handle, u32 offset, android::PixelFormat format, u32 width, u32 height,
|
||||
u32 stride, android::BufferTransformFlags transform,
|
||||
const Common::Rectangle<int>& crop_rect,
|
||||
std::array<Service::Nvidia::NvFence, 4>& fences, u32 num_fences);
|
||||
|
||||
Kernel::KEvent* QueryEvent(u32 event_id) override;
|
||||
|
||||
private:
|
||||
NvCore::Container& container;
|
||||
NvCore::NvMap& nvmap;
|
||||
};
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,220 +1,220 @@
|
||||
// SPDX-FileCopyrightText: 2021 yuzu Emulator Project
|
||||
// SPDX-FileCopyrightText: 2021 Skyline Team and Contributors
|
||||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <bit>
|
||||
#include <list>
|
||||
#include <map>
|
||||
#include <memory>
|
||||
#include <mutex>
|
||||
#include <optional>
|
||||
#include <vector>
|
||||
|
||||
#include "common/address_space.h"
|
||||
#include "common/common_funcs.h"
|
||||
#include "common/common_types.h"
|
||||
#include "common/swap.h"
|
||||
#include "core/hle/service/nvdrv/core/nvmap.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvdevice.h"
|
||||
|
||||
namespace Tegra {
|
||||
class MemoryManager;
|
||||
} // namespace Tegra
|
||||
|
||||
namespace Service::Nvidia {
|
||||
class Module;
|
||||
}
|
||||
|
||||
namespace Service::Nvidia::NvCore {
|
||||
class Container;
|
||||
class NvMap;
|
||||
} // namespace Service::Nvidia::NvCore
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
enum class MappingFlags : u32 {
|
||||
None = 0,
|
||||
Fixed = 1 << 0,
|
||||
Sparse = 1 << 1,
|
||||
Remap = 1 << 8,
|
||||
};
|
||||
DECLARE_ENUM_FLAG_OPERATORS(MappingFlags);
|
||||
|
||||
class nvhost_as_gpu final : public nvdevice {
|
||||
public:
|
||||
explicit nvhost_as_gpu(Core::System& system_, Module& module, NvCore::Container& core);
|
||||
~nvhost_as_gpu() override;
|
||||
|
||||
NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) override;
|
||||
NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) override;
|
||||
NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) override;
|
||||
|
||||
void OnOpen(DeviceFD fd) override;
|
||||
void OnClose(DeviceFD fd) override;
|
||||
|
||||
Kernel::KEvent* QueryEvent(u32 event_id) override;
|
||||
|
||||
struct VaRegion {
|
||||
u64 offset;
|
||||
u32 page_size;
|
||||
u32 _pad0_;
|
||||
u64 pages;
|
||||
};
|
||||
static_assert(sizeof(VaRegion) == 0x18);
|
||||
|
||||
private:
|
||||
struct IoctlAllocAsEx {
|
||||
u32_le flags{}; // usually passes 1
|
||||
s32_le as_fd{}; // ignored; passes 0
|
||||
u32_le big_page_size{};
|
||||
u32_le reserved{}; // ignored; passes 0
|
||||
u64_le va_range_start{};
|
||||
u64_le va_range_end{};
|
||||
u64_le va_range_split{};
|
||||
};
|
||||
static_assert(sizeof(IoctlAllocAsEx) == 40, "IoctlAllocAsEx is incorrect size");
|
||||
|
||||
struct IoctlAllocSpace {
|
||||
u32_le pages{};
|
||||
u32_le page_size{};
|
||||
MappingFlags flags{};
|
||||
INSERT_PADDING_WORDS(1);
|
||||
union {
|
||||
u64_le offset;
|
||||
u64_le align;
|
||||
};
|
||||
};
|
||||
static_assert(sizeof(IoctlAllocSpace) == 24, "IoctlInitalizeEx is incorrect size");
|
||||
|
||||
struct IoctlFreeSpace {
|
||||
u64_le offset{};
|
||||
u32_le pages{};
|
||||
u32_le page_size{};
|
||||
};
|
||||
static_assert(sizeof(IoctlFreeSpace) == 16, "IoctlFreeSpace is incorrect size");
|
||||
|
||||
struct IoctlRemapEntry {
|
||||
u16 flags;
|
||||
u16 kind;
|
||||
NvCore::NvMap::Handle::Id handle;
|
||||
u32 handle_offset_big_pages;
|
||||
u32 as_offset_big_pages;
|
||||
u32 big_pages;
|
||||
};
|
||||
static_assert(sizeof(IoctlRemapEntry) == 20, "IoctlRemapEntry is incorrect size");
|
||||
|
||||
struct IoctlMapBufferEx {
|
||||
MappingFlags flags{}; // bit0: fixed_offset, bit2: cacheable
|
||||
u32_le kind{}; // -1 is default
|
||||
NvCore::NvMap::Handle::Id handle;
|
||||
u32_le page_size{}; // 0 means don't care
|
||||
s64_le buffer_offset{};
|
||||
u64_le mapping_size{};
|
||||
s64_le offset{};
|
||||
};
|
||||
static_assert(sizeof(IoctlMapBufferEx) == 40, "IoctlMapBufferEx is incorrect size");
|
||||
|
||||
struct IoctlUnmapBuffer {
|
||||
s64_le offset{};
|
||||
};
|
||||
static_assert(sizeof(IoctlUnmapBuffer) == 8, "IoctlUnmapBuffer is incorrect size");
|
||||
|
||||
struct IoctlBindChannel {
|
||||
s32_le fd{};
|
||||
};
|
||||
static_assert(sizeof(IoctlBindChannel) == 4, "IoctlBindChannel is incorrect size");
|
||||
|
||||
struct IoctlGetVaRegions {
|
||||
u64_le buf_addr{}; // (contained output user ptr on linux, ignored)
|
||||
u32_le buf_size{}; // forced to 2*sizeof(struct va_region)
|
||||
u32_le reserved{};
|
||||
std::array<VaRegion, 2> regions{};
|
||||
};
|
||||
static_assert(sizeof(IoctlGetVaRegions) == 16 + sizeof(VaRegion) * 2,
|
||||
"IoctlGetVaRegions is incorrect size");
|
||||
|
||||
NvResult AllocAsEx(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult AllocateSpace(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult Remap(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult MapBufferEx(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult UnmapBuffer(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult FreeSpace(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult BindChannel(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
|
||||
void GetVARegionsImpl(IoctlGetVaRegions& params);
|
||||
NvResult GetVARegions(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult GetVARegions(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
std::vector<u8>& inline_output);
|
||||
|
||||
void FreeMappingLocked(u64 offset);
|
||||
|
||||
Module& module;
|
||||
|
||||
NvCore::Container& container;
|
||||
NvCore::NvMap& nvmap;
|
||||
|
||||
struct Mapping {
|
||||
VAddr ptr;
|
||||
u64 offset;
|
||||
u64 size;
|
||||
bool fixed;
|
||||
bool big_page; // Only valid if fixed == false
|
||||
bool sparse_alloc;
|
||||
|
||||
Mapping(VAddr ptr_, u64 offset_, u64 size_, bool fixed_, bool big_page_, bool sparse_alloc_)
|
||||
: ptr(ptr_), offset(offset_), size(size_), fixed(fixed_), big_page(big_page_),
|
||||
sparse_alloc(sparse_alloc_) {}
|
||||
};
|
||||
|
||||
struct Allocation {
|
||||
u64 size;
|
||||
std::list<std::shared_ptr<Mapping>> mappings;
|
||||
u32 page_size;
|
||||
bool sparse;
|
||||
bool big_pages;
|
||||
};
|
||||
|
||||
std::map<u64, std::shared_ptr<Mapping>>
|
||||
mapping_map; //!< This maps the base addresses of mapped buffers to their total sizes and
|
||||
//!< mapping type, this is needed as what was originally a single buffer may
|
||||
//!< have been split into multiple GPU side buffers with the remap flag.
|
||||
std::map<u64, Allocation> allocation_map; //!< Holds allocations created by AllocSpace from
|
||||
//!< which fixed buffers can be mapped into
|
||||
std::mutex mutex; //!< Locks all AS operations
|
||||
|
||||
struct VM {
|
||||
static constexpr u32 YUZU_PAGESIZE{0x1000};
|
||||
static constexpr u32 PAGE_SIZE_BITS{std::countr_zero(YUZU_PAGESIZE)};
|
||||
|
||||
static constexpr u32 SUPPORTED_BIG_PAGE_SIZES{0x30000};
|
||||
static constexpr u32 DEFAULT_BIG_PAGE_SIZE{0x20000};
|
||||
u32 big_page_size{DEFAULT_BIG_PAGE_SIZE};
|
||||
u32 big_page_size_bits{std::countr_zero(DEFAULT_BIG_PAGE_SIZE)};
|
||||
|
||||
static constexpr u32 VA_START_SHIFT{10};
|
||||
static constexpr u64 DEFAULT_VA_SPLIT{1ULL << 34};
|
||||
static constexpr u64 DEFAULT_VA_RANGE{1ULL << 37};
|
||||
u64 va_range_start{DEFAULT_BIG_PAGE_SIZE << VA_START_SHIFT};
|
||||
u64 va_range_split{DEFAULT_VA_SPLIT};
|
||||
u64 va_range_end{DEFAULT_VA_RANGE};
|
||||
|
||||
using Allocator = Common::FlatAllocator<u32, 0, 32>;
|
||||
|
||||
std::unique_ptr<Allocator> big_page_allocator;
|
||||
std::shared_ptr<Allocator>
|
||||
small_page_allocator; //! Shared as this is also used by nvhost::GpuChannel
|
||||
|
||||
bool initialised{};
|
||||
} vm;
|
||||
std::shared_ptr<Tegra::MemoryManager> gmmu;
|
||||
|
||||
// s32 channel{};
|
||||
// u32 big_page_size{VM::DEFAULT_BIG_PAGE_SIZE};
|
||||
};
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
// SPDX-FileCopyrightText: 2021 yuzu Emulator Project
|
||||
// SPDX-FileCopyrightText: 2021 Skyline Team and Contributors
|
||||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <bit>
|
||||
#include <list>
|
||||
#include <map>
|
||||
#include <memory>
|
||||
#include <mutex>
|
||||
#include <optional>
|
||||
#include <vector>
|
||||
|
||||
#include "common/address_space.h"
|
||||
#include "common/common_funcs.h"
|
||||
#include "common/common_types.h"
|
||||
#include "common/swap.h"
|
||||
#include "core/hle/service/nvdrv/core/nvmap.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvdevice.h"
|
||||
|
||||
namespace Tegra {
|
||||
class MemoryManager;
|
||||
} // namespace Tegra
|
||||
|
||||
namespace Service::Nvidia {
|
||||
class Module;
|
||||
}
|
||||
|
||||
namespace Service::Nvidia::NvCore {
|
||||
class Container;
|
||||
class NvMap;
|
||||
} // namespace Service::Nvidia::NvCore
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
enum class MappingFlags : u32 {
|
||||
None = 0,
|
||||
Fixed = 1 << 0,
|
||||
Sparse = 1 << 1,
|
||||
Remap = 1 << 8,
|
||||
};
|
||||
DECLARE_ENUM_FLAG_OPERATORS(MappingFlags);
|
||||
|
||||
class nvhost_as_gpu final : public nvdevice {
|
||||
public:
|
||||
explicit nvhost_as_gpu(Core::System& system_, Module& module, NvCore::Container& core);
|
||||
~nvhost_as_gpu() override;
|
||||
|
||||
NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) override;
|
||||
NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) override;
|
||||
NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) override;
|
||||
|
||||
void OnOpen(DeviceFD fd) override;
|
||||
void OnClose(DeviceFD fd) override;
|
||||
|
||||
Kernel::KEvent* QueryEvent(u32 event_id) override;
|
||||
|
||||
struct VaRegion {
|
||||
u64 offset;
|
||||
u32 page_size;
|
||||
u32 _pad0_;
|
||||
u64 pages;
|
||||
};
|
||||
static_assert(sizeof(VaRegion) == 0x18);
|
||||
|
||||
private:
|
||||
struct IoctlAllocAsEx {
|
||||
u32_le flags{}; // usually passes 1
|
||||
s32_le as_fd{}; // ignored; passes 0
|
||||
u32_le big_page_size{};
|
||||
u32_le reserved{}; // ignored; passes 0
|
||||
u64_le va_range_start{};
|
||||
u64_le va_range_end{};
|
||||
u64_le va_range_split{};
|
||||
};
|
||||
static_assert(sizeof(IoctlAllocAsEx) == 40, "IoctlAllocAsEx is incorrect size");
|
||||
|
||||
struct IoctlAllocSpace {
|
||||
u32_le pages{};
|
||||
u32_le page_size{};
|
||||
MappingFlags flags{};
|
||||
INSERT_PADDING_WORDS(1);
|
||||
union {
|
||||
u64_le offset;
|
||||
u64_le align;
|
||||
};
|
||||
};
|
||||
static_assert(sizeof(IoctlAllocSpace) == 24, "IoctlInitalizeEx is incorrect size");
|
||||
|
||||
struct IoctlFreeSpace {
|
||||
u64_le offset{};
|
||||
u32_le pages{};
|
||||
u32_le page_size{};
|
||||
};
|
||||
static_assert(sizeof(IoctlFreeSpace) == 16, "IoctlFreeSpace is incorrect size");
|
||||
|
||||
struct IoctlRemapEntry {
|
||||
u16 flags;
|
||||
u16 kind;
|
||||
NvCore::NvMap::Handle::Id handle;
|
||||
u32 handle_offset_big_pages;
|
||||
u32 as_offset_big_pages;
|
||||
u32 big_pages;
|
||||
};
|
||||
static_assert(sizeof(IoctlRemapEntry) == 20, "IoctlRemapEntry is incorrect size");
|
||||
|
||||
struct IoctlMapBufferEx {
|
||||
MappingFlags flags{}; // bit0: fixed_offset, bit2: cacheable
|
||||
u32_le kind{}; // -1 is default
|
||||
NvCore::NvMap::Handle::Id handle;
|
||||
u32_le page_size{}; // 0 means don't care
|
||||
s64_le buffer_offset{};
|
||||
u64_le mapping_size{};
|
||||
s64_le offset{};
|
||||
};
|
||||
static_assert(sizeof(IoctlMapBufferEx) == 40, "IoctlMapBufferEx is incorrect size");
|
||||
|
||||
struct IoctlUnmapBuffer {
|
||||
s64_le offset{};
|
||||
};
|
||||
static_assert(sizeof(IoctlUnmapBuffer) == 8, "IoctlUnmapBuffer is incorrect size");
|
||||
|
||||
struct IoctlBindChannel {
|
||||
s32_le fd{};
|
||||
};
|
||||
static_assert(sizeof(IoctlBindChannel) == 4, "IoctlBindChannel is incorrect size");
|
||||
|
||||
struct IoctlGetVaRegions {
|
||||
u64_le buf_addr{}; // (contained output user ptr on linux, ignored)
|
||||
u32_le buf_size{}; // forced to 2*sizeof(struct va_region)
|
||||
u32_le reserved{};
|
||||
std::array<VaRegion, 2> regions{};
|
||||
};
|
||||
static_assert(sizeof(IoctlGetVaRegions) == 16 + sizeof(VaRegion) * 2,
|
||||
"IoctlGetVaRegions is incorrect size");
|
||||
|
||||
NvResult AllocAsEx(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult AllocateSpace(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult Remap(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult MapBufferEx(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult UnmapBuffer(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult FreeSpace(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult BindChannel(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
|
||||
void GetVARegionsImpl(IoctlGetVaRegions& params);
|
||||
NvResult GetVARegions(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult GetVARegions(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
std::vector<u8>& inline_output);
|
||||
|
||||
void FreeMappingLocked(u64 offset);
|
||||
|
||||
Module& module;
|
||||
|
||||
NvCore::Container& container;
|
||||
NvCore::NvMap& nvmap;
|
||||
|
||||
struct Mapping {
|
||||
VAddr ptr;
|
||||
u64 offset;
|
||||
u64 size;
|
||||
bool fixed;
|
||||
bool big_page; // Only valid if fixed == false
|
||||
bool sparse_alloc;
|
||||
|
||||
Mapping(VAddr ptr_, u64 offset_, u64 size_, bool fixed_, bool big_page_, bool sparse_alloc_)
|
||||
: ptr(ptr_), offset(offset_), size(size_), fixed(fixed_), big_page(big_page_),
|
||||
sparse_alloc(sparse_alloc_) {}
|
||||
};
|
||||
|
||||
struct Allocation {
|
||||
u64 size;
|
||||
std::list<std::shared_ptr<Mapping>> mappings;
|
||||
u32 page_size;
|
||||
bool sparse;
|
||||
bool big_pages;
|
||||
};
|
||||
|
||||
std::map<u64, std::shared_ptr<Mapping>>
|
||||
mapping_map; //!< This maps the base addresses of mapped buffers to their total sizes and
|
||||
//!< mapping type, this is needed as what was originally a single buffer may
|
||||
//!< have been split into multiple GPU side buffers with the remap flag.
|
||||
std::map<u64, Allocation> allocation_map; //!< Holds allocations created by AllocSpace from
|
||||
//!< which fixed buffers can be mapped into
|
||||
std::mutex mutex; //!< Locks all AS operations
|
||||
|
||||
struct VM {
|
||||
static constexpr u32 YUZU_PAGESIZE{0x1000};
|
||||
static constexpr u32 PAGE_SIZE_BITS{std::countr_zero(YUZU_PAGESIZE)};
|
||||
|
||||
static constexpr u32 SUPPORTED_BIG_PAGE_SIZES{0x30000};
|
||||
static constexpr u32 DEFAULT_BIG_PAGE_SIZE{0x20000};
|
||||
u32 big_page_size{DEFAULT_BIG_PAGE_SIZE};
|
||||
u32 big_page_size_bits{std::countr_zero(DEFAULT_BIG_PAGE_SIZE)};
|
||||
|
||||
static constexpr u32 VA_START_SHIFT{10};
|
||||
static constexpr u64 DEFAULT_VA_SPLIT{1ULL << 34};
|
||||
static constexpr u64 DEFAULT_VA_RANGE{1ULL << 37};
|
||||
u64 va_range_start{DEFAULT_BIG_PAGE_SIZE << VA_START_SHIFT};
|
||||
u64 va_range_split{DEFAULT_VA_SPLIT};
|
||||
u64 va_range_end{DEFAULT_VA_RANGE};
|
||||
|
||||
using Allocator = Common::FlatAllocator<u32, 0, 32>;
|
||||
|
||||
std::unique_ptr<Allocator> big_page_allocator;
|
||||
std::shared_ptr<Allocator>
|
||||
small_page_allocator; //! Shared as this is also used by nvhost::GpuChannel
|
||||
|
||||
bool initialised{};
|
||||
} vm;
|
||||
std::shared_ptr<Tegra::MemoryManager> gmmu;
|
||||
|
||||
// s32 channel{};
|
||||
// u32 big_page_size{VM::DEFAULT_BIG_PAGE_SIZE};
|
||||
};
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
||||
@@ -1,399 +1,399 @@
|
||||
// SPDX-FileCopyrightText: 2021 yuzu Emulator Project
|
||||
// SPDX-FileCopyrightText: 2021 Skyline Team and Contributors
|
||||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
|
||||
#include <bit>
|
||||
#include <cstdlib>
|
||||
#include <cstring>
|
||||
|
||||
#include <fmt/format.h>
|
||||
#include "common/assert.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "common/scope_exit.h"
|
||||
#include "core/core.h"
|
||||
#include "core/hle/kernel/k_event.h"
|
||||
#include "core/hle/service/nvdrv/core/container.h"
|
||||
#include "core/hle/service/nvdrv/core/syncpoint_manager.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_ctrl.h"
|
||||
#include "video_core/gpu.h"
|
||||
#include "video_core/host1x/host1x.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
nvhost_ctrl::nvhost_ctrl(Core::System& system_, EventInterface& events_interface_,
|
||||
NvCore::Container& core_)
|
||||
: nvdevice{system_}, events_interface{events_interface_}, core{core_},
|
||||
syncpoint_manager{core_.GetSyncpointManager()} {}
|
||||
|
||||
nvhost_ctrl::~nvhost_ctrl() {
|
||||
for (auto& event : events) {
|
||||
if (!event.registered) {
|
||||
continue;
|
||||
}
|
||||
events_interface.FreeEvent(event.kevent);
|
||||
}
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
switch (command.group) {
|
||||
case 0x0:
|
||||
switch (command.cmd) {
|
||||
case 0x1b:
|
||||
return NvOsGetConfigU32(input, output);
|
||||
case 0x1c:
|
||||
return IocCtrlClearEventWait(input, output);
|
||||
case 0x1d:
|
||||
return IocCtrlEventWait(input, output, true);
|
||||
case 0x1e:
|
||||
return IocCtrlEventWait(input, output, false);
|
||||
case 0x1f:
|
||||
return IocCtrlEventRegister(input, output);
|
||||
case 0x20:
|
||||
return IocCtrlEventUnregister(input, output);
|
||||
case 0x21:
|
||||
return IocCtrlEventUnregisterBatch(input, output);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_outpu) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
void nvhost_ctrl::OnOpen(DeviceFD fd) {}
|
||||
|
||||
void nvhost_ctrl::OnClose(DeviceFD fd) {}
|
||||
|
||||
NvResult nvhost_ctrl::NvOsGetConfigU32(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IocGetConfigParams params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
LOG_TRACE(Service_NVDRV, "called, setting={}!{}", params.domain_str.data(),
|
||||
params.param_str.data());
|
||||
return NvResult::ConfigVarNotFound; // Returns error on production mode
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::IocCtrlEventWait(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
bool is_allocation) {
|
||||
IocCtrlEventWaitParams params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
LOG_DEBUG(Service_NVDRV, "syncpt_id={}, threshold={}, timeout={}, is_allocation={}",
|
||||
params.fence.id, params.fence.value, params.timeout, is_allocation);
|
||||
|
||||
bool must_unmark_fail = !is_allocation;
|
||||
const u32 event_id = params.value.raw;
|
||||
SCOPE_EXIT({
|
||||
std::memcpy(output.data(), ¶ms, sizeof(params));
|
||||
if (must_unmark_fail) {
|
||||
events[event_id].fails = 0;
|
||||
}
|
||||
});
|
||||
|
||||
const u32 fence_id = static_cast<u32>(params.fence.id);
|
||||
|
||||
if (fence_id >= MaxSyncPoints) {
|
||||
return NvResult::BadParameter;
|
||||
}
|
||||
|
||||
if (params.fence.value == 0) {
|
||||
if (!syncpoint_manager.IsSyncpointAllocated(params.fence.id)) {
|
||||
LOG_WARNING(Service_NVDRV,
|
||||
"Unallocated syncpt_id={}, threshold={}, timeout={}, is_allocation={}",
|
||||
params.fence.id, params.fence.value, params.timeout, is_allocation);
|
||||
} else {
|
||||
params.value.raw = syncpoint_manager.ReadSyncpointMinValue(fence_id);
|
||||
}
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
if (syncpoint_manager.IsFenceSignalled(params.fence)) {
|
||||
params.value.raw = syncpoint_manager.ReadSyncpointMinValue(fence_id);
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
if (const auto new_value = syncpoint_manager.UpdateMin(fence_id);
|
||||
syncpoint_manager.IsFenceSignalled(params.fence)) {
|
||||
params.value.raw = new_value;
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
auto& host1x_syncpoint_manager = system.Host1x().GetSyncpointManager();
|
||||
const u32 target_value = params.fence.value;
|
||||
|
||||
auto lock = NvEventsLock();
|
||||
|
||||
u32 slot = [&]() {
|
||||
if (is_allocation) {
|
||||
params.value.raw = 0;
|
||||
return FindFreeNvEvent(fence_id);
|
||||
} else {
|
||||
return params.value.raw;
|
||||
}
|
||||
}();
|
||||
|
||||
must_unmark_fail = false;
|
||||
|
||||
const auto check_failing = [&]() {
|
||||
if (events[slot].fails > 2) {
|
||||
{
|
||||
auto lk = system.StallProcesses();
|
||||
host1x_syncpoint_manager.WaitHost(fence_id, target_value);
|
||||
system.UnstallProcesses();
|
||||
}
|
||||
params.value.raw = target_value;
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
};
|
||||
|
||||
if (slot >= MaxNvEvents) {
|
||||
return NvResult::BadParameter;
|
||||
}
|
||||
|
||||
if (params.timeout == 0) {
|
||||
if (check_failing()) {
|
||||
events[slot].fails = 0;
|
||||
return NvResult::Success;
|
||||
}
|
||||
return NvResult::Timeout;
|
||||
}
|
||||
|
||||
auto& event = events[slot];
|
||||
|
||||
if (!event.registered) {
|
||||
return NvResult::BadParameter;
|
||||
}
|
||||
|
||||
if (event.IsBeingUsed()) {
|
||||
return NvResult::BadParameter;
|
||||
}
|
||||
|
||||
if (check_failing()) {
|
||||
event.fails = 0;
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
params.value.raw = 0;
|
||||
|
||||
event.status.store(EventState::Waiting, std::memory_order_release);
|
||||
event.assigned_syncpt = fence_id;
|
||||
event.assigned_value = target_value;
|
||||
if (is_allocation) {
|
||||
params.value.syncpoint_id_for_allocation.Assign(static_cast<u16>(fence_id));
|
||||
params.value.event_allocated.Assign(1);
|
||||
} else {
|
||||
params.value.syncpoint_id.Assign(fence_id);
|
||||
}
|
||||
params.value.raw |= slot;
|
||||
|
||||
event.wait_handle =
|
||||
host1x_syncpoint_manager.RegisterHostAction(fence_id, target_value, [this, slot]() {
|
||||
auto& event_ = events[slot];
|
||||
if (event_.status.exchange(EventState::Signalling, std::memory_order_acq_rel) ==
|
||||
EventState::Waiting) {
|
||||
event_.kevent->Signal();
|
||||
}
|
||||
event_.status.store(EventState::Signalled, std::memory_order_release);
|
||||
});
|
||||
return NvResult::Timeout;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::FreeEvent(u32 slot) {
|
||||
if (slot >= MaxNvEvents) {
|
||||
return NvResult::BadParameter;
|
||||
}
|
||||
|
||||
auto& event = events[slot];
|
||||
|
||||
if (!event.registered) {
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
if (event.IsBeingUsed()) {
|
||||
return NvResult::Busy;
|
||||
}
|
||||
|
||||
FreeNvEvent(slot);
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::IocCtrlEventRegister(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IocCtrlEventRegisterParams params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
const u32 event_id = params.user_event_id;
|
||||
LOG_DEBUG(Service_NVDRV, " called, user_event_id: {:X}", event_id);
|
||||
if (event_id >= MaxNvEvents) {
|
||||
return NvResult::BadParameter;
|
||||
}
|
||||
|
||||
auto lock = NvEventsLock();
|
||||
|
||||
if (events[event_id].registered) {
|
||||
const auto result = FreeEvent(event_id);
|
||||
if (result != NvResult::Success) {
|
||||
return result;
|
||||
}
|
||||
}
|
||||
CreateNvEvent(event_id);
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::IocCtrlEventUnregister(const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
IocCtrlEventUnregisterParams params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
const u32 event_id = params.user_event_id & 0x00FF;
|
||||
LOG_DEBUG(Service_NVDRV, " called, user_event_id: {:X}", event_id);
|
||||
|
||||
auto lock = NvEventsLock();
|
||||
return FreeEvent(event_id);
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::IocCtrlEventUnregisterBatch(const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
IocCtrlEventUnregisterBatchParams params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
u64 event_mask = params.user_events;
|
||||
LOG_DEBUG(Service_NVDRV, " called, event_mask: {:X}", event_mask);
|
||||
|
||||
auto lock = NvEventsLock();
|
||||
while (event_mask != 0) {
|
||||
const u64 event_id = std::countr_zero(event_mask);
|
||||
event_mask &= ~(1ULL << event_id);
|
||||
const auto result = FreeEvent(static_cast<u32>(event_id));
|
||||
if (result != NvResult::Success) {
|
||||
return result;
|
||||
}
|
||||
}
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::IocCtrlClearEventWait(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IocCtrlEventClearParams params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
|
||||
u32 event_id = params.event_id.slot;
|
||||
LOG_DEBUG(Service_NVDRV, "called, event_id: {:X}", event_id);
|
||||
|
||||
if (event_id >= MaxNvEvents) {
|
||||
return NvResult::BadParameter;
|
||||
}
|
||||
|
||||
auto lock = NvEventsLock();
|
||||
|
||||
auto& event = events[event_id];
|
||||
if (event.status.exchange(EventState::Cancelling, std::memory_order_acq_rel) ==
|
||||
EventState::Waiting) {
|
||||
auto& host1x_syncpoint_manager = system.Host1x().GetSyncpointManager();
|
||||
host1x_syncpoint_manager.DeregisterHostAction(event.assigned_syncpt, event.wait_handle);
|
||||
syncpoint_manager.UpdateMin(event.assigned_syncpt);
|
||||
event.wait_handle = {};
|
||||
}
|
||||
event.fails++;
|
||||
event.status.store(EventState::Cancelled, std::memory_order_release);
|
||||
event.kevent->Clear();
|
||||
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
Kernel::KEvent* nvhost_ctrl::QueryEvent(u32 event_id) {
|
||||
const auto desired_event = SyncpointEventValue{.raw = event_id};
|
||||
|
||||
const bool allocated = desired_event.event_allocated.Value() != 0;
|
||||
const u32 slot{allocated ? desired_event.partial_slot.Value()
|
||||
: static_cast<u32>(desired_event.slot)};
|
||||
if (slot >= MaxNvEvents) {
|
||||
ASSERT(false);
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
const u32 syncpoint_id{allocated ? desired_event.syncpoint_id_for_allocation.Value()
|
||||
: desired_event.syncpoint_id.Value()};
|
||||
|
||||
auto lock = NvEventsLock();
|
||||
|
||||
auto& event = events[slot];
|
||||
if (event.registered && event.assigned_syncpt == syncpoint_id) {
|
||||
ASSERT(event.kevent);
|
||||
return event.kevent;
|
||||
}
|
||||
// Is this possible in hardware?
|
||||
ASSERT_MSG(false, "Slot:{}, SyncpointID:{}, requested", slot, syncpoint_id);
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
std::unique_lock<std::mutex> nvhost_ctrl::NvEventsLock() {
|
||||
return std::unique_lock<std::mutex>(events_mutex);
|
||||
}
|
||||
|
||||
void nvhost_ctrl::CreateNvEvent(u32 event_id) {
|
||||
auto& event = events[event_id];
|
||||
ASSERT(!event.kevent);
|
||||
ASSERT(!event.registered);
|
||||
ASSERT(!event.IsBeingUsed());
|
||||
event.kevent = events_interface.CreateEvent(fmt::format("NVCTRL::NvEvent_{}", event_id));
|
||||
event.status = EventState::Available;
|
||||
event.registered = true;
|
||||
const u64 mask = 1ULL << event_id;
|
||||
event.fails = 0;
|
||||
events_mask |= mask;
|
||||
event.assigned_syncpt = 0;
|
||||
}
|
||||
|
||||
void nvhost_ctrl::FreeNvEvent(u32 event_id) {
|
||||
auto& event = events[event_id];
|
||||
ASSERT(event.kevent);
|
||||
ASSERT(event.registered);
|
||||
ASSERT(!event.IsBeingUsed());
|
||||
events_interface.FreeEvent(event.kevent);
|
||||
event.kevent = nullptr;
|
||||
event.status = EventState::Available;
|
||||
event.registered = false;
|
||||
const u64 mask = ~(1ULL << event_id);
|
||||
events_mask &= mask;
|
||||
}
|
||||
|
||||
u32 nvhost_ctrl::FindFreeNvEvent(u32 syncpoint_id) {
|
||||
u32 slot{MaxNvEvents};
|
||||
u32 free_slot{MaxNvEvents};
|
||||
for (u32 i = 0; i < MaxNvEvents; i++) {
|
||||
auto& event = events[i];
|
||||
if (event.registered) {
|
||||
if (!event.IsBeingUsed()) {
|
||||
slot = i;
|
||||
if (event.assigned_syncpt == syncpoint_id) {
|
||||
return slot;
|
||||
}
|
||||
}
|
||||
} else if (free_slot == MaxNvEvents) {
|
||||
free_slot = i;
|
||||
}
|
||||
}
|
||||
if (free_slot < MaxNvEvents) {
|
||||
CreateNvEvent(free_slot);
|
||||
return free_slot;
|
||||
}
|
||||
|
||||
if (slot < MaxNvEvents) {
|
||||
return slot;
|
||||
}
|
||||
|
||||
LOG_CRITICAL(Service_NVDRV, "Failed to allocate an event");
|
||||
return 0;
|
||||
}
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
// SPDX-FileCopyrightText: 2021 yuzu Emulator Project
|
||||
// SPDX-FileCopyrightText: 2021 Skyline Team and Contributors
|
||||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
|
||||
#include <bit>
|
||||
#include <cstdlib>
|
||||
#include <cstring>
|
||||
|
||||
#include <fmt/format.h>
|
||||
#include "common/assert.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "common/scope_exit.h"
|
||||
#include "core/core.h"
|
||||
#include "core/hle/kernel/k_event.h"
|
||||
#include "core/hle/service/nvdrv/core/container.h"
|
||||
#include "core/hle/service/nvdrv/core/syncpoint_manager.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_ctrl.h"
|
||||
#include "video_core/gpu.h"
|
||||
#include "video_core/host1x/host1x.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
nvhost_ctrl::nvhost_ctrl(Core::System& system_, EventInterface& events_interface_,
|
||||
NvCore::Container& core_)
|
||||
: nvdevice{system_}, events_interface{events_interface_}, core{core_},
|
||||
syncpoint_manager{core_.GetSyncpointManager()} {}
|
||||
|
||||
nvhost_ctrl::~nvhost_ctrl() {
|
||||
for (auto& event : events) {
|
||||
if (!event.registered) {
|
||||
continue;
|
||||
}
|
||||
events_interface.FreeEvent(event.kevent);
|
||||
}
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
switch (command.group) {
|
||||
case 0x0:
|
||||
switch (command.cmd) {
|
||||
case 0x1b:
|
||||
return NvOsGetConfigU32(input, output);
|
||||
case 0x1c:
|
||||
return IocCtrlClearEventWait(input, output);
|
||||
case 0x1d:
|
||||
return IocCtrlEventWait(input, output, true);
|
||||
case 0x1e:
|
||||
return IocCtrlEventWait(input, output, false);
|
||||
case 0x1f:
|
||||
return IocCtrlEventRegister(input, output);
|
||||
case 0x20:
|
||||
return IocCtrlEventUnregister(input, output);
|
||||
case 0x21:
|
||||
return IocCtrlEventUnregisterBatch(input, output);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_outpu) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
void nvhost_ctrl::OnOpen(DeviceFD fd) {}
|
||||
|
||||
void nvhost_ctrl::OnClose(DeviceFD fd) {}
|
||||
|
||||
NvResult nvhost_ctrl::NvOsGetConfigU32(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IocGetConfigParams params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
LOG_TRACE(Service_NVDRV, "called, setting={}!{}", params.domain_str.data(),
|
||||
params.param_str.data());
|
||||
return NvResult::ConfigVarNotFound; // Returns error on production mode
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::IocCtrlEventWait(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
bool is_allocation) {
|
||||
IocCtrlEventWaitParams params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
LOG_DEBUG(Service_NVDRV, "syncpt_id={}, threshold={}, timeout={}, is_allocation={}",
|
||||
params.fence.id, params.fence.value, params.timeout, is_allocation);
|
||||
|
||||
bool must_unmark_fail = !is_allocation;
|
||||
const u32 event_id = params.value.raw;
|
||||
SCOPE_EXIT({
|
||||
std::memcpy(output.data(), ¶ms, sizeof(params));
|
||||
if (must_unmark_fail) {
|
||||
events[event_id].fails = 0;
|
||||
}
|
||||
});
|
||||
|
||||
const u32 fence_id = static_cast<u32>(params.fence.id);
|
||||
|
||||
if (fence_id >= MaxSyncPoints) {
|
||||
return NvResult::BadParameter;
|
||||
}
|
||||
|
||||
if (params.fence.value == 0) {
|
||||
if (!syncpoint_manager.IsSyncpointAllocated(params.fence.id)) {
|
||||
LOG_WARNING(Service_NVDRV,
|
||||
"Unallocated syncpt_id={}, threshold={}, timeout={}, is_allocation={}",
|
||||
params.fence.id, params.fence.value, params.timeout, is_allocation);
|
||||
} else {
|
||||
params.value.raw = syncpoint_manager.ReadSyncpointMinValue(fence_id);
|
||||
}
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
if (syncpoint_manager.IsFenceSignalled(params.fence)) {
|
||||
params.value.raw = syncpoint_manager.ReadSyncpointMinValue(fence_id);
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
if (const auto new_value = syncpoint_manager.UpdateMin(fence_id);
|
||||
syncpoint_manager.IsFenceSignalled(params.fence)) {
|
||||
params.value.raw = new_value;
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
auto& host1x_syncpoint_manager = system.Host1x().GetSyncpointManager();
|
||||
const u32 target_value = params.fence.value;
|
||||
|
||||
auto lock = NvEventsLock();
|
||||
|
||||
u32 slot = [&]() {
|
||||
if (is_allocation) {
|
||||
params.value.raw = 0;
|
||||
return FindFreeNvEvent(fence_id);
|
||||
} else {
|
||||
return params.value.raw;
|
||||
}
|
||||
}();
|
||||
|
||||
must_unmark_fail = false;
|
||||
|
||||
const auto check_failing = [&]() {
|
||||
if (events[slot].fails > 2) {
|
||||
{
|
||||
auto lk = system.StallProcesses();
|
||||
host1x_syncpoint_manager.WaitHost(fence_id, target_value);
|
||||
system.UnstallProcesses();
|
||||
}
|
||||
params.value.raw = target_value;
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
};
|
||||
|
||||
if (slot >= MaxNvEvents) {
|
||||
return NvResult::BadParameter;
|
||||
}
|
||||
|
||||
if (params.timeout == 0) {
|
||||
if (check_failing()) {
|
||||
events[slot].fails = 0;
|
||||
return NvResult::Success;
|
||||
}
|
||||
return NvResult::Timeout;
|
||||
}
|
||||
|
||||
auto& event = events[slot];
|
||||
|
||||
if (!event.registered) {
|
||||
return NvResult::BadParameter;
|
||||
}
|
||||
|
||||
if (event.IsBeingUsed()) {
|
||||
return NvResult::BadParameter;
|
||||
}
|
||||
|
||||
if (check_failing()) {
|
||||
event.fails = 0;
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
params.value.raw = 0;
|
||||
|
||||
event.status.store(EventState::Waiting, std::memory_order_release);
|
||||
event.assigned_syncpt = fence_id;
|
||||
event.assigned_value = target_value;
|
||||
if (is_allocation) {
|
||||
params.value.syncpoint_id_for_allocation.Assign(static_cast<u16>(fence_id));
|
||||
params.value.event_allocated.Assign(1);
|
||||
} else {
|
||||
params.value.syncpoint_id.Assign(fence_id);
|
||||
}
|
||||
params.value.raw |= slot;
|
||||
|
||||
event.wait_handle =
|
||||
host1x_syncpoint_manager.RegisterHostAction(fence_id, target_value, [this, slot]() {
|
||||
auto& event_ = events[slot];
|
||||
if (event_.status.exchange(EventState::Signalling, std::memory_order_acq_rel) ==
|
||||
EventState::Waiting) {
|
||||
event_.kevent->Signal();
|
||||
}
|
||||
event_.status.store(EventState::Signalled, std::memory_order_release);
|
||||
});
|
||||
return NvResult::Timeout;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::FreeEvent(u32 slot) {
|
||||
if (slot >= MaxNvEvents) {
|
||||
return NvResult::BadParameter;
|
||||
}
|
||||
|
||||
auto& event = events[slot];
|
||||
|
||||
if (!event.registered) {
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
if (event.IsBeingUsed()) {
|
||||
return NvResult::Busy;
|
||||
}
|
||||
|
||||
FreeNvEvent(slot);
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::IocCtrlEventRegister(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IocCtrlEventRegisterParams params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
const u32 event_id = params.user_event_id;
|
||||
LOG_DEBUG(Service_NVDRV, " called, user_event_id: {:X}", event_id);
|
||||
if (event_id >= MaxNvEvents) {
|
||||
return NvResult::BadParameter;
|
||||
}
|
||||
|
||||
auto lock = NvEventsLock();
|
||||
|
||||
if (events[event_id].registered) {
|
||||
const auto result = FreeEvent(event_id);
|
||||
if (result != NvResult::Success) {
|
||||
return result;
|
||||
}
|
||||
}
|
||||
CreateNvEvent(event_id);
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::IocCtrlEventUnregister(const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
IocCtrlEventUnregisterParams params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
const u32 event_id = params.user_event_id & 0x00FF;
|
||||
LOG_DEBUG(Service_NVDRV, " called, user_event_id: {:X}", event_id);
|
||||
|
||||
auto lock = NvEventsLock();
|
||||
return FreeEvent(event_id);
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::IocCtrlEventUnregisterBatch(const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
IocCtrlEventUnregisterBatchParams params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
u64 event_mask = params.user_events;
|
||||
LOG_DEBUG(Service_NVDRV, " called, event_mask: {:X}", event_mask);
|
||||
|
||||
auto lock = NvEventsLock();
|
||||
while (event_mask != 0) {
|
||||
const u64 event_id = std::countr_zero(event_mask);
|
||||
event_mask &= ~(1ULL << event_id);
|
||||
const auto result = FreeEvent(static_cast<u32>(event_id));
|
||||
if (result != NvResult::Success) {
|
||||
return result;
|
||||
}
|
||||
}
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl::IocCtrlClearEventWait(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IocCtrlEventClearParams params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
|
||||
u32 event_id = params.event_id.slot;
|
||||
LOG_DEBUG(Service_NVDRV, "called, event_id: {:X}", event_id);
|
||||
|
||||
if (event_id >= MaxNvEvents) {
|
||||
return NvResult::BadParameter;
|
||||
}
|
||||
|
||||
auto lock = NvEventsLock();
|
||||
|
||||
auto& event = events[event_id];
|
||||
if (event.status.exchange(EventState::Cancelling, std::memory_order_acq_rel) ==
|
||||
EventState::Waiting) {
|
||||
auto& host1x_syncpoint_manager = system.Host1x().GetSyncpointManager();
|
||||
host1x_syncpoint_manager.DeregisterHostAction(event.assigned_syncpt, event.wait_handle);
|
||||
syncpoint_manager.UpdateMin(event.assigned_syncpt);
|
||||
event.wait_handle = {};
|
||||
}
|
||||
event.fails++;
|
||||
event.status.store(EventState::Cancelled, std::memory_order_release);
|
||||
event.kevent->Clear();
|
||||
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
Kernel::KEvent* nvhost_ctrl::QueryEvent(u32 event_id) {
|
||||
const auto desired_event = SyncpointEventValue{.raw = event_id};
|
||||
|
||||
const bool allocated = desired_event.event_allocated.Value() != 0;
|
||||
const u32 slot{allocated ? desired_event.partial_slot.Value()
|
||||
: static_cast<u32>(desired_event.slot)};
|
||||
if (slot >= MaxNvEvents) {
|
||||
ASSERT(false);
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
const u32 syncpoint_id{allocated ? desired_event.syncpoint_id_for_allocation.Value()
|
||||
: desired_event.syncpoint_id.Value()};
|
||||
|
||||
auto lock = NvEventsLock();
|
||||
|
||||
auto& event = events[slot];
|
||||
if (event.registered && event.assigned_syncpt == syncpoint_id) {
|
||||
ASSERT(event.kevent);
|
||||
return event.kevent;
|
||||
}
|
||||
// Is this possible in hardware?
|
||||
ASSERT_MSG(false, "Slot:{}, SyncpointID:{}, requested", slot, syncpoint_id);
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
std::unique_lock<std::mutex> nvhost_ctrl::NvEventsLock() {
|
||||
return std::unique_lock<std::mutex>(events_mutex);
|
||||
}
|
||||
|
||||
void nvhost_ctrl::CreateNvEvent(u32 event_id) {
|
||||
auto& event = events[event_id];
|
||||
ASSERT(!event.kevent);
|
||||
ASSERT(!event.registered);
|
||||
ASSERT(!event.IsBeingUsed());
|
||||
event.kevent = events_interface.CreateEvent(fmt::format("NVCTRL::NvEvent_{}", event_id));
|
||||
event.status = EventState::Available;
|
||||
event.registered = true;
|
||||
const u64 mask = 1ULL << event_id;
|
||||
event.fails = 0;
|
||||
events_mask |= mask;
|
||||
event.assigned_syncpt = 0;
|
||||
}
|
||||
|
||||
void nvhost_ctrl::FreeNvEvent(u32 event_id) {
|
||||
auto& event = events[event_id];
|
||||
ASSERT(event.kevent);
|
||||
ASSERT(event.registered);
|
||||
ASSERT(!event.IsBeingUsed());
|
||||
events_interface.FreeEvent(event.kevent);
|
||||
event.kevent = nullptr;
|
||||
event.status = EventState::Available;
|
||||
event.registered = false;
|
||||
const u64 mask = ~(1ULL << event_id);
|
||||
events_mask &= mask;
|
||||
}
|
||||
|
||||
u32 nvhost_ctrl::FindFreeNvEvent(u32 syncpoint_id) {
|
||||
u32 slot{MaxNvEvents};
|
||||
u32 free_slot{MaxNvEvents};
|
||||
for (u32 i = 0; i < MaxNvEvents; i++) {
|
||||
auto& event = events[i];
|
||||
if (event.registered) {
|
||||
if (!event.IsBeingUsed()) {
|
||||
slot = i;
|
||||
if (event.assigned_syncpt == syncpoint_id) {
|
||||
return slot;
|
||||
}
|
||||
}
|
||||
} else if (free_slot == MaxNvEvents) {
|
||||
free_slot = i;
|
||||
}
|
||||
}
|
||||
if (free_slot < MaxNvEvents) {
|
||||
CreateNvEvent(free_slot);
|
||||
return free_slot;
|
||||
}
|
||||
|
||||
if (slot < MaxNvEvents) {
|
||||
return slot;
|
||||
}
|
||||
|
||||
LOG_CRITICAL(Service_NVDRV, "Failed to allocate an event");
|
||||
return 0;
|
||||
}
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
||||
@@ -1,204 +1,204 @@
|
||||
// SPDX-FileCopyrightText: 2021 yuzu Emulator Project
|
||||
// SPDX-FileCopyrightText: 2021 Skyline Team and Contributors
|
||||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <array>
|
||||
#include <vector>
|
||||
#include "common/bit_field.h"
|
||||
#include "common/common_types.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvdevice.h"
|
||||
#include "core/hle/service/nvdrv/nvdrv.h"
|
||||
#include "video_core/host1x/syncpoint_manager.h"
|
||||
|
||||
namespace Service::Nvidia::NvCore {
|
||||
class Container;
|
||||
class SyncpointManager;
|
||||
} // namespace Service::Nvidia::NvCore
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
class nvhost_ctrl final : public nvdevice {
|
||||
public:
|
||||
explicit nvhost_ctrl(Core::System& system_, EventInterface& events_interface_,
|
||||
NvCore::Container& core);
|
||||
~nvhost_ctrl() override;
|
||||
|
||||
NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) override;
|
||||
NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) override;
|
||||
NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) override;
|
||||
|
||||
void OnOpen(DeviceFD fd) override;
|
||||
void OnClose(DeviceFD fd) override;
|
||||
|
||||
Kernel::KEvent* QueryEvent(u32 event_id) override;
|
||||
|
||||
union SyncpointEventValue {
|
||||
u32 raw;
|
||||
|
||||
union {
|
||||
BitField<0, 4, u32> partial_slot;
|
||||
BitField<4, 28, u32> syncpoint_id;
|
||||
};
|
||||
|
||||
struct {
|
||||
u16 slot;
|
||||
union {
|
||||
BitField<0, 12, u16> syncpoint_id_for_allocation;
|
||||
BitField<12, 1, u16> event_allocated;
|
||||
};
|
||||
};
|
||||
};
|
||||
static_assert(sizeof(SyncpointEventValue) == sizeof(u32));
|
||||
|
||||
private:
|
||||
struct InternalEvent {
|
||||
// Mask representing registered events
|
||||
|
||||
// Each kernel event associated to an NV event
|
||||
Kernel::KEvent* kevent{};
|
||||
// The status of the current NVEvent
|
||||
std::atomic<EventState> status{};
|
||||
|
||||
// Tells the NVEvent that it has failed.
|
||||
u32 fails{};
|
||||
// When an NVEvent is waiting on GPU interrupt, this is the sync_point
|
||||
// associated with it.
|
||||
u32 assigned_syncpt{};
|
||||
// This is the value of the GPU interrupt for which the NVEvent is waiting
|
||||
// for.
|
||||
u32 assigned_value{};
|
||||
|
||||
// Tells if an NVEvent is registered or not
|
||||
bool registered{};
|
||||
|
||||
// Used for waiting on a syncpoint & canceling it.
|
||||
Tegra::Host1x::SyncpointManager::ActionHandle wait_handle{};
|
||||
|
||||
bool IsBeingUsed() const {
|
||||
const auto current_status = status.load(std::memory_order_acquire);
|
||||
return current_status == EventState::Waiting ||
|
||||
current_status == EventState::Cancelling ||
|
||||
current_status == EventState::Signalling;
|
||||
}
|
||||
};
|
||||
|
||||
std::unique_lock<std::mutex> NvEventsLock();
|
||||
|
||||
void CreateNvEvent(u32 event_id);
|
||||
|
||||
void FreeNvEvent(u32 event_id);
|
||||
|
||||
u32 FindFreeNvEvent(u32 syncpoint_id);
|
||||
|
||||
std::array<InternalEvent, MaxNvEvents> events{};
|
||||
std::mutex events_mutex;
|
||||
u64 events_mask{};
|
||||
|
||||
struct IocSyncptReadParams {
|
||||
u32_le id{};
|
||||
u32_le value{};
|
||||
};
|
||||
static_assert(sizeof(IocSyncptReadParams) == 8, "IocSyncptReadParams is incorrect size");
|
||||
|
||||
struct IocSyncptIncrParams {
|
||||
u32_le id{};
|
||||
};
|
||||
static_assert(sizeof(IocSyncptIncrParams) == 4, "IocSyncptIncrParams is incorrect size");
|
||||
|
||||
struct IocSyncptWaitParams {
|
||||
u32_le id{};
|
||||
u32_le thresh{};
|
||||
s32_le timeout{};
|
||||
};
|
||||
static_assert(sizeof(IocSyncptWaitParams) == 12, "IocSyncptWaitParams is incorrect size");
|
||||
|
||||
struct IocModuleMutexParams {
|
||||
u32_le id{};
|
||||
u32_le lock{}; // (0 = unlock and 1 = lock)
|
||||
};
|
||||
static_assert(sizeof(IocModuleMutexParams) == 8, "IocModuleMutexParams is incorrect size");
|
||||
|
||||
struct IocModuleRegRDWRParams {
|
||||
u32_le id{};
|
||||
u32_le num_offsets{};
|
||||
u32_le block_size{};
|
||||
u32_le offsets{};
|
||||
u32_le values{};
|
||||
u32_le write{};
|
||||
};
|
||||
static_assert(sizeof(IocModuleRegRDWRParams) == 24, "IocModuleRegRDWRParams is incorrect size");
|
||||
|
||||
struct IocSyncptWaitexParams {
|
||||
u32_le id{};
|
||||
u32_le thresh{};
|
||||
s32_le timeout{};
|
||||
u32_le value{};
|
||||
};
|
||||
static_assert(sizeof(IocSyncptWaitexParams) == 16, "IocSyncptWaitexParams is incorrect size");
|
||||
|
||||
struct IocSyncptReadMaxParams {
|
||||
u32_le id{};
|
||||
u32_le value{};
|
||||
};
|
||||
static_assert(sizeof(IocSyncptReadMaxParams) == 8, "IocSyncptReadMaxParams is incorrect size");
|
||||
|
||||
struct IocGetConfigParams {
|
||||
std::array<char, 0x41> domain_str{};
|
||||
std::array<char, 0x41> param_str{};
|
||||
std::array<char, 0x101> config_str{};
|
||||
};
|
||||
static_assert(sizeof(IocGetConfigParams) == 387, "IocGetConfigParams is incorrect size");
|
||||
|
||||
struct IocCtrlEventClearParams {
|
||||
SyncpointEventValue event_id{};
|
||||
};
|
||||
static_assert(sizeof(IocCtrlEventClearParams) == 4,
|
||||
"IocCtrlEventClearParams is incorrect size");
|
||||
|
||||
struct IocCtrlEventWaitParams {
|
||||
NvFence fence{};
|
||||
u32_le timeout{};
|
||||
SyncpointEventValue value{};
|
||||
};
|
||||
static_assert(sizeof(IocCtrlEventWaitParams) == 16,
|
||||
"IocCtrlEventWaitAsyncParams is incorrect size");
|
||||
|
||||
struct IocCtrlEventRegisterParams {
|
||||
u32_le user_event_id{};
|
||||
};
|
||||
static_assert(sizeof(IocCtrlEventRegisterParams) == 4,
|
||||
"IocCtrlEventRegisterParams is incorrect size");
|
||||
|
||||
struct IocCtrlEventUnregisterParams {
|
||||
u32_le user_event_id{};
|
||||
};
|
||||
static_assert(sizeof(IocCtrlEventUnregisterParams) == 4,
|
||||
"IocCtrlEventUnregisterParams is incorrect size");
|
||||
|
||||
struct IocCtrlEventUnregisterBatchParams {
|
||||
u64_le user_events{};
|
||||
};
|
||||
static_assert(sizeof(IocCtrlEventUnregisterBatchParams) == 8,
|
||||
"IocCtrlEventKill is incorrect size");
|
||||
|
||||
NvResult NvOsGetConfigU32(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocCtrlEventWait(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
bool is_allocation);
|
||||
NvResult IocCtrlEventRegister(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocCtrlEventUnregister(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocCtrlEventUnregisterBatch(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocCtrlClearEventWait(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
|
||||
NvResult FreeEvent(u32 slot);
|
||||
|
||||
EventInterface& events_interface;
|
||||
NvCore::Container& core;
|
||||
NvCore::SyncpointManager& syncpoint_manager;
|
||||
};
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
// SPDX-FileCopyrightText: 2021 yuzu Emulator Project
|
||||
// SPDX-FileCopyrightText: 2021 Skyline Team and Contributors
|
||||
// SPDX-License-Identifier: GPL-3.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <array>
|
||||
#include <vector>
|
||||
#include "common/bit_field.h"
|
||||
#include "common/common_types.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvdevice.h"
|
||||
#include "core/hle/service/nvdrv/nvdrv.h"
|
||||
#include "video_core/host1x/syncpoint_manager.h"
|
||||
|
||||
namespace Service::Nvidia::NvCore {
|
||||
class Container;
|
||||
class SyncpointManager;
|
||||
} // namespace Service::Nvidia::NvCore
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
class nvhost_ctrl final : public nvdevice {
|
||||
public:
|
||||
explicit nvhost_ctrl(Core::System& system_, EventInterface& events_interface_,
|
||||
NvCore::Container& core);
|
||||
~nvhost_ctrl() override;
|
||||
|
||||
NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) override;
|
||||
NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) override;
|
||||
NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) override;
|
||||
|
||||
void OnOpen(DeviceFD fd) override;
|
||||
void OnClose(DeviceFD fd) override;
|
||||
|
||||
Kernel::KEvent* QueryEvent(u32 event_id) override;
|
||||
|
||||
union SyncpointEventValue {
|
||||
u32 raw;
|
||||
|
||||
union {
|
||||
BitField<0, 4, u32> partial_slot;
|
||||
BitField<4, 28, u32> syncpoint_id;
|
||||
};
|
||||
|
||||
struct {
|
||||
u16 slot;
|
||||
union {
|
||||
BitField<0, 12, u16> syncpoint_id_for_allocation;
|
||||
BitField<12, 1, u16> event_allocated;
|
||||
};
|
||||
};
|
||||
};
|
||||
static_assert(sizeof(SyncpointEventValue) == sizeof(u32));
|
||||
|
||||
private:
|
||||
struct InternalEvent {
|
||||
// Mask representing registered events
|
||||
|
||||
// Each kernel event associated to an NV event
|
||||
Kernel::KEvent* kevent{};
|
||||
// The status of the current NVEvent
|
||||
std::atomic<EventState> status{};
|
||||
|
||||
// Tells the NVEvent that it has failed.
|
||||
u32 fails{};
|
||||
// When an NVEvent is waiting on GPU interrupt, this is the sync_point
|
||||
// associated with it.
|
||||
u32 assigned_syncpt{};
|
||||
// This is the value of the GPU interrupt for which the NVEvent is waiting
|
||||
// for.
|
||||
u32 assigned_value{};
|
||||
|
||||
// Tells if an NVEvent is registered or not
|
||||
bool registered{};
|
||||
|
||||
// Used for waiting on a syncpoint & canceling it.
|
||||
Tegra::Host1x::SyncpointManager::ActionHandle wait_handle{};
|
||||
|
||||
bool IsBeingUsed() const {
|
||||
const auto current_status = status.load(std::memory_order_acquire);
|
||||
return current_status == EventState::Waiting ||
|
||||
current_status == EventState::Cancelling ||
|
||||
current_status == EventState::Signalling;
|
||||
}
|
||||
};
|
||||
|
||||
std::unique_lock<std::mutex> NvEventsLock();
|
||||
|
||||
void CreateNvEvent(u32 event_id);
|
||||
|
||||
void FreeNvEvent(u32 event_id);
|
||||
|
||||
u32 FindFreeNvEvent(u32 syncpoint_id);
|
||||
|
||||
std::array<InternalEvent, MaxNvEvents> events{};
|
||||
std::mutex events_mutex;
|
||||
u64 events_mask{};
|
||||
|
||||
struct IocSyncptReadParams {
|
||||
u32_le id{};
|
||||
u32_le value{};
|
||||
};
|
||||
static_assert(sizeof(IocSyncptReadParams) == 8, "IocSyncptReadParams is incorrect size");
|
||||
|
||||
struct IocSyncptIncrParams {
|
||||
u32_le id{};
|
||||
};
|
||||
static_assert(sizeof(IocSyncptIncrParams) == 4, "IocSyncptIncrParams is incorrect size");
|
||||
|
||||
struct IocSyncptWaitParams {
|
||||
u32_le id{};
|
||||
u32_le thresh{};
|
||||
s32_le timeout{};
|
||||
};
|
||||
static_assert(sizeof(IocSyncptWaitParams) == 12, "IocSyncptWaitParams is incorrect size");
|
||||
|
||||
struct IocModuleMutexParams {
|
||||
u32_le id{};
|
||||
u32_le lock{}; // (0 = unlock and 1 = lock)
|
||||
};
|
||||
static_assert(sizeof(IocModuleMutexParams) == 8, "IocModuleMutexParams is incorrect size");
|
||||
|
||||
struct IocModuleRegRDWRParams {
|
||||
u32_le id{};
|
||||
u32_le num_offsets{};
|
||||
u32_le block_size{};
|
||||
u32_le offsets{};
|
||||
u32_le values{};
|
||||
u32_le write{};
|
||||
};
|
||||
static_assert(sizeof(IocModuleRegRDWRParams) == 24, "IocModuleRegRDWRParams is incorrect size");
|
||||
|
||||
struct IocSyncptWaitexParams {
|
||||
u32_le id{};
|
||||
u32_le thresh{};
|
||||
s32_le timeout{};
|
||||
u32_le value{};
|
||||
};
|
||||
static_assert(sizeof(IocSyncptWaitexParams) == 16, "IocSyncptWaitexParams is incorrect size");
|
||||
|
||||
struct IocSyncptReadMaxParams {
|
||||
u32_le id{};
|
||||
u32_le value{};
|
||||
};
|
||||
static_assert(sizeof(IocSyncptReadMaxParams) == 8, "IocSyncptReadMaxParams is incorrect size");
|
||||
|
||||
struct IocGetConfigParams {
|
||||
std::array<char, 0x41> domain_str{};
|
||||
std::array<char, 0x41> param_str{};
|
||||
std::array<char, 0x101> config_str{};
|
||||
};
|
||||
static_assert(sizeof(IocGetConfigParams) == 387, "IocGetConfigParams is incorrect size");
|
||||
|
||||
struct IocCtrlEventClearParams {
|
||||
SyncpointEventValue event_id{};
|
||||
};
|
||||
static_assert(sizeof(IocCtrlEventClearParams) == 4,
|
||||
"IocCtrlEventClearParams is incorrect size");
|
||||
|
||||
struct IocCtrlEventWaitParams {
|
||||
NvFence fence{};
|
||||
u32_le timeout{};
|
||||
SyncpointEventValue value{};
|
||||
};
|
||||
static_assert(sizeof(IocCtrlEventWaitParams) == 16,
|
||||
"IocCtrlEventWaitAsyncParams is incorrect size");
|
||||
|
||||
struct IocCtrlEventRegisterParams {
|
||||
u32_le user_event_id{};
|
||||
};
|
||||
static_assert(sizeof(IocCtrlEventRegisterParams) == 4,
|
||||
"IocCtrlEventRegisterParams is incorrect size");
|
||||
|
||||
struct IocCtrlEventUnregisterParams {
|
||||
u32_le user_event_id{};
|
||||
};
|
||||
static_assert(sizeof(IocCtrlEventUnregisterParams) == 4,
|
||||
"IocCtrlEventUnregisterParams is incorrect size");
|
||||
|
||||
struct IocCtrlEventUnregisterBatchParams {
|
||||
u64_le user_events{};
|
||||
};
|
||||
static_assert(sizeof(IocCtrlEventUnregisterBatchParams) == 8,
|
||||
"IocCtrlEventKill is incorrect size");
|
||||
|
||||
NvResult NvOsGetConfigU32(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocCtrlEventWait(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
bool is_allocation);
|
||||
NvResult IocCtrlEventRegister(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocCtrlEventUnregister(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocCtrlEventUnregisterBatch(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocCtrlClearEventWait(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
|
||||
NvResult FreeEvent(u32 slot);
|
||||
|
||||
EventInterface& events_interface;
|
||||
NvCore::Container& core;
|
||||
NvCore::SyncpointManager& syncpoint_manager;
|
||||
};
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
||||
@@ -1,310 +1,310 @@
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include <cstring>
|
||||
#include "common/assert.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "core/core.h"
|
||||
#include "core/core_timing.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h"
|
||||
#include "core/hle/service/nvdrv/nvdrv.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
nvhost_ctrl_gpu::nvhost_ctrl_gpu(Core::System& system_, EventInterface& events_interface_)
|
||||
: nvdevice{system_}, events_interface{events_interface_} {
|
||||
error_notifier_event = events_interface.CreateEvent("CtrlGpuErrorNotifier");
|
||||
unknown_event = events_interface.CreateEvent("CtrlGpuUknownEvent");
|
||||
}
|
||||
nvhost_ctrl_gpu::~nvhost_ctrl_gpu() {
|
||||
events_interface.FreeEvent(error_notifier_event);
|
||||
events_interface.FreeEvent(unknown_event);
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
switch (command.group) {
|
||||
case 'G':
|
||||
switch (command.cmd) {
|
||||
case 0x1:
|
||||
return ZCullGetCtxSize(input, output);
|
||||
case 0x2:
|
||||
return ZCullGetInfo(input, output);
|
||||
case 0x3:
|
||||
return ZBCSetTable(input, output);
|
||||
case 0x4:
|
||||
return ZBCQueryTable(input, output);
|
||||
case 0x5:
|
||||
return GetCharacteristics(input, output);
|
||||
case 0x6:
|
||||
return GetTPCMasks(input, output);
|
||||
case 0x7:
|
||||
return FlushL2(input, output);
|
||||
case 0x14:
|
||||
return GetActiveSlotMask(input, output);
|
||||
case 0x1c:
|
||||
return GetGpuTime(input, output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) {
|
||||
switch (command.group) {
|
||||
case 'G':
|
||||
switch (command.cmd) {
|
||||
case 0x5:
|
||||
return GetCharacteristics(input, output, inline_output);
|
||||
case 0x6:
|
||||
return GetTPCMasks(input, output, inline_output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
void nvhost_ctrl_gpu::OnOpen(DeviceFD fd) {}
|
||||
void nvhost_ctrl_gpu::OnClose(DeviceFD fd) {}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::GetCharacteristics(const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
IoctlCharacteristics params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
params.gc.arch = 0x120;
|
||||
params.gc.impl = 0xb;
|
||||
params.gc.rev = 0xa1;
|
||||
params.gc.num_gpc = 0x1;
|
||||
params.gc.l2_cache_size = 0x40000;
|
||||
params.gc.on_board_video_memory_size = 0x0;
|
||||
params.gc.num_tpc_per_gpc = 0x2;
|
||||
params.gc.bus_type = 0x20;
|
||||
params.gc.big_page_size = 0x20000;
|
||||
params.gc.compression_page_size = 0x20000;
|
||||
params.gc.pde_coverage_bit_count = 0x1B;
|
||||
params.gc.available_big_page_sizes = 0x30000;
|
||||
params.gc.gpc_mask = 0x1;
|
||||
params.gc.sm_arch_sm_version = 0x503;
|
||||
params.gc.sm_arch_spa_version = 0x503;
|
||||
params.gc.sm_arch_warp_count = 0x80;
|
||||
params.gc.gpu_va_bit_count = 0x28;
|
||||
params.gc.reserved = 0x0;
|
||||
params.gc.flags = 0x55;
|
||||
params.gc.twod_class = 0x902D;
|
||||
params.gc.threed_class = 0xB197;
|
||||
params.gc.compute_class = 0xB1C0;
|
||||
params.gc.gpfifo_class = 0xB06F;
|
||||
params.gc.inline_to_memory_class = 0xA140;
|
||||
params.gc.dma_copy_class = 0xB0B5;
|
||||
params.gc.max_fbps_count = 0x1;
|
||||
params.gc.fbp_en_mask = 0x0;
|
||||
params.gc.max_ltc_per_fbp = 0x2;
|
||||
params.gc.max_lts_per_ltc = 0x1;
|
||||
params.gc.max_tex_per_tpc = 0x0;
|
||||
params.gc.max_gpc_count = 0x1;
|
||||
params.gc.rop_l2_en_mask_0 = 0x21D70;
|
||||
params.gc.rop_l2_en_mask_1 = 0x0;
|
||||
params.gc.chipname = 0x6230326D67;
|
||||
params.gc.gr_compbit_store_base_hw = 0x0;
|
||||
params.gpu_characteristics_buf_size = 0xA0;
|
||||
params.gpu_characteristics_buf_addr = 0xdeadbeef; // Cannot be 0 (UNUSED)
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::GetCharacteristics(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
std::vector<u8>& inline_output) {
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
IoctlCharacteristics params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
params.gc.arch = 0x120;
|
||||
params.gc.impl = 0xb;
|
||||
params.gc.rev = 0xa1;
|
||||
params.gc.num_gpc = 0x1;
|
||||
params.gc.l2_cache_size = 0x40000;
|
||||
params.gc.on_board_video_memory_size = 0x0;
|
||||
params.gc.num_tpc_per_gpc = 0x2;
|
||||
params.gc.bus_type = 0x20;
|
||||
params.gc.big_page_size = 0x20000;
|
||||
params.gc.compression_page_size = 0x20000;
|
||||
params.gc.pde_coverage_bit_count = 0x1B;
|
||||
params.gc.available_big_page_sizes = 0x30000;
|
||||
params.gc.gpc_mask = 0x1;
|
||||
params.gc.sm_arch_sm_version = 0x503;
|
||||
params.gc.sm_arch_spa_version = 0x503;
|
||||
params.gc.sm_arch_warp_count = 0x80;
|
||||
params.gc.gpu_va_bit_count = 0x28;
|
||||
params.gc.reserved = 0x0;
|
||||
params.gc.flags = 0x55;
|
||||
params.gc.twod_class = 0x902D;
|
||||
params.gc.threed_class = 0xB197;
|
||||
params.gc.compute_class = 0xB1C0;
|
||||
params.gc.gpfifo_class = 0xB06F;
|
||||
params.gc.inline_to_memory_class = 0xA140;
|
||||
params.gc.dma_copy_class = 0xB0B5;
|
||||
params.gc.max_fbps_count = 0x1;
|
||||
params.gc.fbp_en_mask = 0x0;
|
||||
params.gc.max_ltc_per_fbp = 0x2;
|
||||
params.gc.max_lts_per_ltc = 0x1;
|
||||
params.gc.max_tex_per_tpc = 0x0;
|
||||
params.gc.max_gpc_count = 0x1;
|
||||
params.gc.rop_l2_en_mask_0 = 0x21D70;
|
||||
params.gc.rop_l2_en_mask_1 = 0x0;
|
||||
params.gc.chipname = 0x6230326D67;
|
||||
params.gc.gr_compbit_store_base_hw = 0x0;
|
||||
params.gpu_characteristics_buf_size = 0xA0;
|
||||
params.gpu_characteristics_buf_addr = 0xdeadbeef; // Cannot be 0 (UNUSED)
|
||||
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
std::memcpy(inline_output.data(), ¶ms.gc, inline_output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlGpuGetTpcMasksArgs params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
LOG_DEBUG(Service_NVDRV, "called, mask_buffer_size=0x{:X}", params.mask_buffer_size);
|
||||
if (params.mask_buffer_size != 0) {
|
||||
params.tcp_mask = 3;
|
||||
}
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
std::vector<u8>& inline_output) {
|
||||
IoctlGpuGetTpcMasksArgs params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
LOG_DEBUG(Service_NVDRV, "called, mask_buffer_size=0x{:X}", params.mask_buffer_size);
|
||||
if (params.mask_buffer_size != 0) {
|
||||
params.tcp_mask = 3;
|
||||
}
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
std::memcpy(inline_output.data(), ¶ms.tcp_mask, inline_output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::GetActiveSlotMask(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
|
||||
IoctlActiveSlotMask params{};
|
||||
if (input.size() > 0) {
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
}
|
||||
params.slot = 0x07;
|
||||
params.mask = 0x01;
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::ZCullGetCtxSize(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
|
||||
IoctlZcullGetCtxSize params{};
|
||||
if (input.size() > 0) {
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
}
|
||||
params.size = 0x1;
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::ZCullGetInfo(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
|
||||
IoctlNvgpuGpuZcullGetInfoArgs params{};
|
||||
|
||||
if (input.size() > 0) {
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
}
|
||||
|
||||
params.width_align_pixels = 0x20;
|
||||
params.height_align_pixels = 0x20;
|
||||
params.pixel_squares_by_aliquots = 0x400;
|
||||
params.aliquot_total = 0x800;
|
||||
params.region_byte_multiplier = 0x20;
|
||||
params.region_header_size = 0x20;
|
||||
params.subregion_header_size = 0xc0;
|
||||
params.subregion_width_align_pixels = 0x20;
|
||||
params.subregion_height_align_pixels = 0x40;
|
||||
params.subregion_count = 0x10;
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::ZBCSetTable(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_WARNING(Service_NVDRV, "(STUBBED) called");
|
||||
|
||||
IoctlZbcSetTable params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
// TODO(ogniK): What does this even actually do?
|
||||
|
||||
// Prevent null pointer being passed as arg 1
|
||||
if (output.empty()) {
|
||||
LOG_WARNING(Service_NVDRV, "Avoiding passing null pointer to memcpy");
|
||||
} else {
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
}
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::ZBCQueryTable(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_WARNING(Service_NVDRV, "(STUBBED) called");
|
||||
|
||||
IoctlZbcQueryTable params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
// TODO : To implement properly
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::FlushL2(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_WARNING(Service_NVDRV, "(STUBBED) called");
|
||||
|
||||
IoctlFlushL2 params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
// TODO : To implement properly
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::GetGpuTime(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
|
||||
IoctlGetGpuTime params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
params.gpu_time = static_cast<u64_le>(system.CoreTiming().GetGlobalTimeNs().count());
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
Kernel::KEvent* nvhost_ctrl_gpu::QueryEvent(u32 event_id) {
|
||||
switch (event_id) {
|
||||
case 1:
|
||||
return error_notifier_event;
|
||||
case 2:
|
||||
return unknown_event;
|
||||
default: {
|
||||
LOG_CRITICAL(Service_NVDRV, "Unknown Ctrl GPU Event {}", event_id);
|
||||
}
|
||||
}
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include <cstring>
|
||||
#include "common/assert.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "core/core.h"
|
||||
#include "core/core_timing.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_ctrl_gpu.h"
|
||||
#include "core/hle/service/nvdrv/nvdrv.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
nvhost_ctrl_gpu::nvhost_ctrl_gpu(Core::System& system_, EventInterface& events_interface_)
|
||||
: nvdevice{system_}, events_interface{events_interface_} {
|
||||
error_notifier_event = events_interface.CreateEvent("CtrlGpuErrorNotifier");
|
||||
unknown_event = events_interface.CreateEvent("CtrlGpuUknownEvent");
|
||||
}
|
||||
nvhost_ctrl_gpu::~nvhost_ctrl_gpu() {
|
||||
events_interface.FreeEvent(error_notifier_event);
|
||||
events_interface.FreeEvent(unknown_event);
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
switch (command.group) {
|
||||
case 'G':
|
||||
switch (command.cmd) {
|
||||
case 0x1:
|
||||
return ZCullGetCtxSize(input, output);
|
||||
case 0x2:
|
||||
return ZCullGetInfo(input, output);
|
||||
case 0x3:
|
||||
return ZBCSetTable(input, output);
|
||||
case 0x4:
|
||||
return ZBCQueryTable(input, output);
|
||||
case 0x5:
|
||||
return GetCharacteristics(input, output);
|
||||
case 0x6:
|
||||
return GetTPCMasks(input, output);
|
||||
case 0x7:
|
||||
return FlushL2(input, output);
|
||||
case 0x14:
|
||||
return GetActiveSlotMask(input, output);
|
||||
case 0x1c:
|
||||
return GetGpuTime(input, output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) {
|
||||
switch (command.group) {
|
||||
case 'G':
|
||||
switch (command.cmd) {
|
||||
case 0x5:
|
||||
return GetCharacteristics(input, output, inline_output);
|
||||
case 0x6:
|
||||
return GetTPCMasks(input, output, inline_output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
void nvhost_ctrl_gpu::OnOpen(DeviceFD fd) {}
|
||||
void nvhost_ctrl_gpu::OnClose(DeviceFD fd) {}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::GetCharacteristics(const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
IoctlCharacteristics params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
params.gc.arch = 0x120;
|
||||
params.gc.impl = 0xb;
|
||||
params.gc.rev = 0xa1;
|
||||
params.gc.num_gpc = 0x1;
|
||||
params.gc.l2_cache_size = 0x40000;
|
||||
params.gc.on_board_video_memory_size = 0x0;
|
||||
params.gc.num_tpc_per_gpc = 0x2;
|
||||
params.gc.bus_type = 0x20;
|
||||
params.gc.big_page_size = 0x20000;
|
||||
params.gc.compression_page_size = 0x20000;
|
||||
params.gc.pde_coverage_bit_count = 0x1B;
|
||||
params.gc.available_big_page_sizes = 0x30000;
|
||||
params.gc.gpc_mask = 0x1;
|
||||
params.gc.sm_arch_sm_version = 0x503;
|
||||
params.gc.sm_arch_spa_version = 0x503;
|
||||
params.gc.sm_arch_warp_count = 0x80;
|
||||
params.gc.gpu_va_bit_count = 0x28;
|
||||
params.gc.reserved = 0x0;
|
||||
params.gc.flags = 0x55;
|
||||
params.gc.twod_class = 0x902D;
|
||||
params.gc.threed_class = 0xB197;
|
||||
params.gc.compute_class = 0xB1C0;
|
||||
params.gc.gpfifo_class = 0xB06F;
|
||||
params.gc.inline_to_memory_class = 0xA140;
|
||||
params.gc.dma_copy_class = 0xB0B5;
|
||||
params.gc.max_fbps_count = 0x1;
|
||||
params.gc.fbp_en_mask = 0x0;
|
||||
params.gc.max_ltc_per_fbp = 0x2;
|
||||
params.gc.max_lts_per_ltc = 0x1;
|
||||
params.gc.max_tex_per_tpc = 0x0;
|
||||
params.gc.max_gpc_count = 0x1;
|
||||
params.gc.rop_l2_en_mask_0 = 0x21D70;
|
||||
params.gc.rop_l2_en_mask_1 = 0x0;
|
||||
params.gc.chipname = 0x6230326D67;
|
||||
params.gc.gr_compbit_store_base_hw = 0x0;
|
||||
params.gpu_characteristics_buf_size = 0xA0;
|
||||
params.gpu_characteristics_buf_addr = 0xdeadbeef; // Cannot be 0 (UNUSED)
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::GetCharacteristics(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
std::vector<u8>& inline_output) {
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
IoctlCharacteristics params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
params.gc.arch = 0x120;
|
||||
params.gc.impl = 0xb;
|
||||
params.gc.rev = 0xa1;
|
||||
params.gc.num_gpc = 0x1;
|
||||
params.gc.l2_cache_size = 0x40000;
|
||||
params.gc.on_board_video_memory_size = 0x0;
|
||||
params.gc.num_tpc_per_gpc = 0x2;
|
||||
params.gc.bus_type = 0x20;
|
||||
params.gc.big_page_size = 0x20000;
|
||||
params.gc.compression_page_size = 0x20000;
|
||||
params.gc.pde_coverage_bit_count = 0x1B;
|
||||
params.gc.available_big_page_sizes = 0x30000;
|
||||
params.gc.gpc_mask = 0x1;
|
||||
params.gc.sm_arch_sm_version = 0x503;
|
||||
params.gc.sm_arch_spa_version = 0x503;
|
||||
params.gc.sm_arch_warp_count = 0x80;
|
||||
params.gc.gpu_va_bit_count = 0x28;
|
||||
params.gc.reserved = 0x0;
|
||||
params.gc.flags = 0x55;
|
||||
params.gc.twod_class = 0x902D;
|
||||
params.gc.threed_class = 0xB197;
|
||||
params.gc.compute_class = 0xB1C0;
|
||||
params.gc.gpfifo_class = 0xB06F;
|
||||
params.gc.inline_to_memory_class = 0xA140;
|
||||
params.gc.dma_copy_class = 0xB0B5;
|
||||
params.gc.max_fbps_count = 0x1;
|
||||
params.gc.fbp_en_mask = 0x0;
|
||||
params.gc.max_ltc_per_fbp = 0x2;
|
||||
params.gc.max_lts_per_ltc = 0x1;
|
||||
params.gc.max_tex_per_tpc = 0x0;
|
||||
params.gc.max_gpc_count = 0x1;
|
||||
params.gc.rop_l2_en_mask_0 = 0x21D70;
|
||||
params.gc.rop_l2_en_mask_1 = 0x0;
|
||||
params.gc.chipname = 0x6230326D67;
|
||||
params.gc.gr_compbit_store_base_hw = 0x0;
|
||||
params.gpu_characteristics_buf_size = 0xA0;
|
||||
params.gpu_characteristics_buf_addr = 0xdeadbeef; // Cannot be 0 (UNUSED)
|
||||
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
std::memcpy(inline_output.data(), ¶ms.gc, inline_output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlGpuGetTpcMasksArgs params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
LOG_DEBUG(Service_NVDRV, "called, mask_buffer_size=0x{:X}", params.mask_buffer_size);
|
||||
if (params.mask_buffer_size != 0) {
|
||||
params.tcp_mask = 3;
|
||||
}
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
std::vector<u8>& inline_output) {
|
||||
IoctlGpuGetTpcMasksArgs params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
LOG_DEBUG(Service_NVDRV, "called, mask_buffer_size=0x{:X}", params.mask_buffer_size);
|
||||
if (params.mask_buffer_size != 0) {
|
||||
params.tcp_mask = 3;
|
||||
}
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
std::memcpy(inline_output.data(), ¶ms.tcp_mask, inline_output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::GetActiveSlotMask(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
|
||||
IoctlActiveSlotMask params{};
|
||||
if (input.size() > 0) {
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
}
|
||||
params.slot = 0x07;
|
||||
params.mask = 0x01;
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::ZCullGetCtxSize(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
|
||||
IoctlZcullGetCtxSize params{};
|
||||
if (input.size() > 0) {
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
}
|
||||
params.size = 0x1;
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::ZCullGetInfo(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
|
||||
IoctlNvgpuGpuZcullGetInfoArgs params{};
|
||||
|
||||
if (input.size() > 0) {
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
}
|
||||
|
||||
params.width_align_pixels = 0x20;
|
||||
params.height_align_pixels = 0x20;
|
||||
params.pixel_squares_by_aliquots = 0x400;
|
||||
params.aliquot_total = 0x800;
|
||||
params.region_byte_multiplier = 0x20;
|
||||
params.region_header_size = 0x20;
|
||||
params.subregion_header_size = 0xc0;
|
||||
params.subregion_width_align_pixels = 0x20;
|
||||
params.subregion_height_align_pixels = 0x40;
|
||||
params.subregion_count = 0x10;
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::ZBCSetTable(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_WARNING(Service_NVDRV, "(STUBBED) called");
|
||||
|
||||
IoctlZbcSetTable params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
// TODO(ogniK): What does this even actually do?
|
||||
|
||||
// Prevent null pointer being passed as arg 1
|
||||
if (output.empty()) {
|
||||
LOG_WARNING(Service_NVDRV, "Avoiding passing null pointer to memcpy");
|
||||
} else {
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
}
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::ZBCQueryTable(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_WARNING(Service_NVDRV, "(STUBBED) called");
|
||||
|
||||
IoctlZbcQueryTable params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
// TODO : To implement properly
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::FlushL2(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_WARNING(Service_NVDRV, "(STUBBED) called");
|
||||
|
||||
IoctlFlushL2 params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
// TODO : To implement properly
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_ctrl_gpu::GetGpuTime(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
|
||||
IoctlGetGpuTime params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
params.gpu_time = static_cast<u64_le>(system.CoreTiming().GetGlobalTimeNs().count());
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
Kernel::KEvent* nvhost_ctrl_gpu::QueryEvent(u32 event_id) {
|
||||
switch (event_id) {
|
||||
case 1:
|
||||
return error_notifier_event;
|
||||
case 2:
|
||||
return unknown_event;
|
||||
default: {
|
||||
LOG_CRITICAL(Service_NVDRV, "Unknown Ctrl GPU Event {}", event_id);
|
||||
}
|
||||
}
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
||||
@@ -1,177 +1,177 @@
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <vector>
|
||||
|
||||
#include "common/common_funcs.h"
|
||||
#include "common/common_types.h"
|
||||
#include "common/swap.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvdevice.h"
|
||||
|
||||
namespace Service::Nvidia {
|
||||
class EventInterface;
|
||||
}
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
class nvhost_ctrl_gpu final : public nvdevice {
|
||||
public:
|
||||
explicit nvhost_ctrl_gpu(Core::System& system_, EventInterface& events_interface_);
|
||||
~nvhost_ctrl_gpu() override;
|
||||
|
||||
NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) override;
|
||||
NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) override;
|
||||
NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) override;
|
||||
|
||||
void OnOpen(DeviceFD fd) override;
|
||||
void OnClose(DeviceFD fd) override;
|
||||
|
||||
Kernel::KEvent* QueryEvent(u32 event_id) override;
|
||||
|
||||
private:
|
||||
struct IoctlGpuCharacteristics {
|
||||
u32_le arch; // 0x120 (NVGPU_GPU_ARCH_GM200)
|
||||
u32_le impl; // 0xB (NVGPU_GPU_IMPL_GM20B)
|
||||
u32_le rev; // 0xA1 (Revision A1)
|
||||
u32_le num_gpc; // 0x1
|
||||
u64_le l2_cache_size; // 0x40000
|
||||
u64_le on_board_video_memory_size; // 0x0 (not used)
|
||||
u32_le num_tpc_per_gpc; // 0x2
|
||||
u32_le bus_type; // 0x20 (NVGPU_GPU_BUS_TYPE_AXI)
|
||||
u32_le big_page_size; // 0x20000
|
||||
u32_le compression_page_size; // 0x20000
|
||||
u32_le pde_coverage_bit_count; // 0x1B
|
||||
u32_le available_big_page_sizes; // 0x30000
|
||||
u32_le gpc_mask; // 0x1
|
||||
u32_le sm_arch_sm_version; // 0x503 (Maxwell Generation 5.0.3?)
|
||||
u32_le sm_arch_spa_version; // 0x503 (Maxwell Generation 5.0.3?)
|
||||
u32_le sm_arch_warp_count; // 0x80
|
||||
u32_le gpu_va_bit_count; // 0x28
|
||||
u32_le reserved; // NULL
|
||||
u64_le flags; // 0x55
|
||||
u32_le twod_class; // 0x902D (FERMI_TWOD_A)
|
||||
u32_le threed_class; // 0xB197 (MAXWELL_B)
|
||||
u32_le compute_class; // 0xB1C0 (MAXWELL_COMPUTE_B)
|
||||
u32_le gpfifo_class; // 0xB06F (MAXWELL_CHANNEL_GPFIFO_A)
|
||||
u32_le inline_to_memory_class; // 0xA140 (KEPLER_INLINE_TO_MEMORY_B)
|
||||
u32_le dma_copy_class; // 0xB0B5 (MAXWELL_DMA_COPY_A)
|
||||
u32_le max_fbps_count; // 0x1
|
||||
u32_le fbp_en_mask; // 0x0 (disabled)
|
||||
u32_le max_ltc_per_fbp; // 0x2
|
||||
u32_le max_lts_per_ltc; // 0x1
|
||||
u32_le max_tex_per_tpc; // 0x0 (not supported)
|
||||
u32_le max_gpc_count; // 0x1
|
||||
u32_le rop_l2_en_mask_0; // 0x21D70 (fuse_status_opt_rop_l2_fbp_r)
|
||||
u32_le rop_l2_en_mask_1; // 0x0
|
||||
u64_le chipname; // 0x6230326D67 ("gm20b")
|
||||
u64_le gr_compbit_store_base_hw; // 0x0 (not supported)
|
||||
};
|
||||
static_assert(sizeof(IoctlGpuCharacteristics) == 160,
|
||||
"IoctlGpuCharacteristics is incorrect size");
|
||||
|
||||
struct IoctlCharacteristics {
|
||||
u64_le gpu_characteristics_buf_size; // must not be NULL, but gets overwritten with
|
||||
// 0xA0=max_size
|
||||
u64_le gpu_characteristics_buf_addr; // ignored, but must not be NULL
|
||||
IoctlGpuCharacteristics gc;
|
||||
};
|
||||
static_assert(sizeof(IoctlCharacteristics) == 16 + sizeof(IoctlGpuCharacteristics),
|
||||
"IoctlCharacteristics is incorrect size");
|
||||
|
||||
struct IoctlGpuGetTpcMasksArgs {
|
||||
u32_le mask_buffer_size{};
|
||||
INSERT_PADDING_WORDS(1);
|
||||
u64_le mask_buffer_address{};
|
||||
u32_le tcp_mask{};
|
||||
INSERT_PADDING_WORDS(1);
|
||||
};
|
||||
static_assert(sizeof(IoctlGpuGetTpcMasksArgs) == 24,
|
||||
"IoctlGpuGetTpcMasksArgs is incorrect size");
|
||||
|
||||
struct IoctlActiveSlotMask {
|
||||
u32_le slot; // always 0x07
|
||||
u32_le mask;
|
||||
};
|
||||
static_assert(sizeof(IoctlActiveSlotMask) == 8, "IoctlActiveSlotMask is incorrect size");
|
||||
|
||||
struct IoctlZcullGetCtxSize {
|
||||
u32_le size;
|
||||
};
|
||||
static_assert(sizeof(IoctlZcullGetCtxSize) == 4, "IoctlZcullGetCtxSize is incorrect size");
|
||||
|
||||
struct IoctlNvgpuGpuZcullGetInfoArgs {
|
||||
u32_le width_align_pixels;
|
||||
u32_le height_align_pixels;
|
||||
u32_le pixel_squares_by_aliquots;
|
||||
u32_le aliquot_total;
|
||||
u32_le region_byte_multiplier;
|
||||
u32_le region_header_size;
|
||||
u32_le subregion_header_size;
|
||||
u32_le subregion_width_align_pixels;
|
||||
u32_le subregion_height_align_pixels;
|
||||
u32_le subregion_count;
|
||||
};
|
||||
static_assert(sizeof(IoctlNvgpuGpuZcullGetInfoArgs) == 40,
|
||||
"IoctlNvgpuGpuZcullGetInfoArgs is incorrect size");
|
||||
|
||||
struct IoctlZbcSetTable {
|
||||
u32_le color_ds[4];
|
||||
u32_le color_l2[4];
|
||||
u32_le depth;
|
||||
u32_le format;
|
||||
u32_le type;
|
||||
};
|
||||
static_assert(sizeof(IoctlZbcSetTable) == 44, "IoctlZbcSetTable is incorrect size");
|
||||
|
||||
struct IoctlZbcQueryTable {
|
||||
u32_le color_ds[4];
|
||||
u32_le color_l2[4];
|
||||
u32_le depth;
|
||||
u32_le ref_cnt;
|
||||
u32_le format;
|
||||
u32_le type;
|
||||
u32_le index_size;
|
||||
};
|
||||
static_assert(sizeof(IoctlZbcQueryTable) == 52, "IoctlZbcQueryTable is incorrect size");
|
||||
|
||||
struct IoctlFlushL2 {
|
||||
u32_le flush; // l2_flush | l2_invalidate << 1 | fb_flush << 2
|
||||
u32_le reserved;
|
||||
};
|
||||
static_assert(sizeof(IoctlFlushL2) == 8, "IoctlFlushL2 is incorrect size");
|
||||
|
||||
struct IoctlGetGpuTime {
|
||||
u64_le gpu_time{};
|
||||
INSERT_PADDING_WORDS(2);
|
||||
};
|
||||
static_assert(sizeof(IoctlGetGpuTime) == 0x10, "IoctlGetGpuTime is incorrect size");
|
||||
|
||||
NvResult GetCharacteristics(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult GetCharacteristics(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
std::vector<u8>& inline_output);
|
||||
|
||||
NvResult GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
std::vector<u8>& inline_output);
|
||||
|
||||
NvResult GetActiveSlotMask(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult ZCullGetCtxSize(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult ZCullGetInfo(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult ZBCSetTable(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult ZBCQueryTable(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult FlushL2(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult GetGpuTime(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
|
||||
EventInterface& events_interface;
|
||||
|
||||
// Events
|
||||
Kernel::KEvent* error_notifier_event;
|
||||
Kernel::KEvent* unknown_event;
|
||||
};
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <vector>
|
||||
|
||||
#include "common/common_funcs.h"
|
||||
#include "common/common_types.h"
|
||||
#include "common/swap.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvdevice.h"
|
||||
|
||||
namespace Service::Nvidia {
|
||||
class EventInterface;
|
||||
}
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
class nvhost_ctrl_gpu final : public nvdevice {
|
||||
public:
|
||||
explicit nvhost_ctrl_gpu(Core::System& system_, EventInterface& events_interface_);
|
||||
~nvhost_ctrl_gpu() override;
|
||||
|
||||
NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) override;
|
||||
NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) override;
|
||||
NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) override;
|
||||
|
||||
void OnOpen(DeviceFD fd) override;
|
||||
void OnClose(DeviceFD fd) override;
|
||||
|
||||
Kernel::KEvent* QueryEvent(u32 event_id) override;
|
||||
|
||||
private:
|
||||
struct IoctlGpuCharacteristics {
|
||||
u32_le arch; // 0x120 (NVGPU_GPU_ARCH_GM200)
|
||||
u32_le impl; // 0xB (NVGPU_GPU_IMPL_GM20B)
|
||||
u32_le rev; // 0xA1 (Revision A1)
|
||||
u32_le num_gpc; // 0x1
|
||||
u64_le l2_cache_size; // 0x40000
|
||||
u64_le on_board_video_memory_size; // 0x0 (not used)
|
||||
u32_le num_tpc_per_gpc; // 0x2
|
||||
u32_le bus_type; // 0x20 (NVGPU_GPU_BUS_TYPE_AXI)
|
||||
u32_le big_page_size; // 0x20000
|
||||
u32_le compression_page_size; // 0x20000
|
||||
u32_le pde_coverage_bit_count; // 0x1B
|
||||
u32_le available_big_page_sizes; // 0x30000
|
||||
u32_le gpc_mask; // 0x1
|
||||
u32_le sm_arch_sm_version; // 0x503 (Maxwell Generation 5.0.3?)
|
||||
u32_le sm_arch_spa_version; // 0x503 (Maxwell Generation 5.0.3?)
|
||||
u32_le sm_arch_warp_count; // 0x80
|
||||
u32_le gpu_va_bit_count; // 0x28
|
||||
u32_le reserved; // NULL
|
||||
u64_le flags; // 0x55
|
||||
u32_le twod_class; // 0x902D (FERMI_TWOD_A)
|
||||
u32_le threed_class; // 0xB197 (MAXWELL_B)
|
||||
u32_le compute_class; // 0xB1C0 (MAXWELL_COMPUTE_B)
|
||||
u32_le gpfifo_class; // 0xB06F (MAXWELL_CHANNEL_GPFIFO_A)
|
||||
u32_le inline_to_memory_class; // 0xA140 (KEPLER_INLINE_TO_MEMORY_B)
|
||||
u32_le dma_copy_class; // 0xB0B5 (MAXWELL_DMA_COPY_A)
|
||||
u32_le max_fbps_count; // 0x1
|
||||
u32_le fbp_en_mask; // 0x0 (disabled)
|
||||
u32_le max_ltc_per_fbp; // 0x2
|
||||
u32_le max_lts_per_ltc; // 0x1
|
||||
u32_le max_tex_per_tpc; // 0x0 (not supported)
|
||||
u32_le max_gpc_count; // 0x1
|
||||
u32_le rop_l2_en_mask_0; // 0x21D70 (fuse_status_opt_rop_l2_fbp_r)
|
||||
u32_le rop_l2_en_mask_1; // 0x0
|
||||
u64_le chipname; // 0x6230326D67 ("gm20b")
|
||||
u64_le gr_compbit_store_base_hw; // 0x0 (not supported)
|
||||
};
|
||||
static_assert(sizeof(IoctlGpuCharacteristics) == 160,
|
||||
"IoctlGpuCharacteristics is incorrect size");
|
||||
|
||||
struct IoctlCharacteristics {
|
||||
u64_le gpu_characteristics_buf_size; // must not be NULL, but gets overwritten with
|
||||
// 0xA0=max_size
|
||||
u64_le gpu_characteristics_buf_addr; // ignored, but must not be NULL
|
||||
IoctlGpuCharacteristics gc;
|
||||
};
|
||||
static_assert(sizeof(IoctlCharacteristics) == 16 + sizeof(IoctlGpuCharacteristics),
|
||||
"IoctlCharacteristics is incorrect size");
|
||||
|
||||
struct IoctlGpuGetTpcMasksArgs {
|
||||
u32_le mask_buffer_size{};
|
||||
INSERT_PADDING_WORDS(1);
|
||||
u64_le mask_buffer_address{};
|
||||
u32_le tcp_mask{};
|
||||
INSERT_PADDING_WORDS(1);
|
||||
};
|
||||
static_assert(sizeof(IoctlGpuGetTpcMasksArgs) == 24,
|
||||
"IoctlGpuGetTpcMasksArgs is incorrect size");
|
||||
|
||||
struct IoctlActiveSlotMask {
|
||||
u32_le slot; // always 0x07
|
||||
u32_le mask;
|
||||
};
|
||||
static_assert(sizeof(IoctlActiveSlotMask) == 8, "IoctlActiveSlotMask is incorrect size");
|
||||
|
||||
struct IoctlZcullGetCtxSize {
|
||||
u32_le size;
|
||||
};
|
||||
static_assert(sizeof(IoctlZcullGetCtxSize) == 4, "IoctlZcullGetCtxSize is incorrect size");
|
||||
|
||||
struct IoctlNvgpuGpuZcullGetInfoArgs {
|
||||
u32_le width_align_pixels;
|
||||
u32_le height_align_pixels;
|
||||
u32_le pixel_squares_by_aliquots;
|
||||
u32_le aliquot_total;
|
||||
u32_le region_byte_multiplier;
|
||||
u32_le region_header_size;
|
||||
u32_le subregion_header_size;
|
||||
u32_le subregion_width_align_pixels;
|
||||
u32_le subregion_height_align_pixels;
|
||||
u32_le subregion_count;
|
||||
};
|
||||
static_assert(sizeof(IoctlNvgpuGpuZcullGetInfoArgs) == 40,
|
||||
"IoctlNvgpuGpuZcullGetInfoArgs is incorrect size");
|
||||
|
||||
struct IoctlZbcSetTable {
|
||||
u32_le color_ds[4];
|
||||
u32_le color_l2[4];
|
||||
u32_le depth;
|
||||
u32_le format;
|
||||
u32_le type;
|
||||
};
|
||||
static_assert(sizeof(IoctlZbcSetTable) == 44, "IoctlZbcSetTable is incorrect size");
|
||||
|
||||
struct IoctlZbcQueryTable {
|
||||
u32_le color_ds[4];
|
||||
u32_le color_l2[4];
|
||||
u32_le depth;
|
||||
u32_le ref_cnt;
|
||||
u32_le format;
|
||||
u32_le type;
|
||||
u32_le index_size;
|
||||
};
|
||||
static_assert(sizeof(IoctlZbcQueryTable) == 52, "IoctlZbcQueryTable is incorrect size");
|
||||
|
||||
struct IoctlFlushL2 {
|
||||
u32_le flush; // l2_flush | l2_invalidate << 1 | fb_flush << 2
|
||||
u32_le reserved;
|
||||
};
|
||||
static_assert(sizeof(IoctlFlushL2) == 8, "IoctlFlushL2 is incorrect size");
|
||||
|
||||
struct IoctlGetGpuTime {
|
||||
u64_le gpu_time{};
|
||||
INSERT_PADDING_WORDS(2);
|
||||
};
|
||||
static_assert(sizeof(IoctlGetGpuTime) == 0x10, "IoctlGetGpuTime is incorrect size");
|
||||
|
||||
NvResult GetCharacteristics(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult GetCharacteristics(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
std::vector<u8>& inline_output);
|
||||
|
||||
NvResult GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult GetTPCMasks(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
std::vector<u8>& inline_output);
|
||||
|
||||
NvResult GetActiveSlotMask(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult ZCullGetCtxSize(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult ZCullGetInfo(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult ZBCSetTable(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult ZBCQueryTable(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult FlushL2(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult GetGpuTime(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
|
||||
EventInterface& events_interface;
|
||||
|
||||
// Events
|
||||
Kernel::KEvent* error_notifier_event;
|
||||
Kernel::KEvent* unknown_event;
|
||||
};
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
||||
@@ -1,374 +1,374 @@
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include <cstring>
|
||||
#include "common/assert.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "core/core.h"
|
||||
#include "core/hle/service/nvdrv/core/container.h"
|
||||
#include "core/hle/service/nvdrv/core/nvmap.h"
|
||||
#include "core/hle/service/nvdrv/core/syncpoint_manager.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_gpu.h"
|
||||
#include "core/hle/service/nvdrv/nvdrv.h"
|
||||
#include "core/memory.h"
|
||||
#include "video_core/control/channel_state.h"
|
||||
#include "video_core/engines/puller.h"
|
||||
#include "video_core/gpu.h"
|
||||
#include "video_core/host1x/host1x.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
namespace {
|
||||
Tegra::CommandHeader BuildFenceAction(Tegra::Engines::Puller::FenceOperation op, u32 syncpoint_id) {
|
||||
Tegra::Engines::Puller::FenceAction result{};
|
||||
result.op.Assign(op);
|
||||
result.syncpoint_id.Assign(syncpoint_id);
|
||||
return {result.raw};
|
||||
}
|
||||
} // namespace
|
||||
|
||||
nvhost_gpu::nvhost_gpu(Core::System& system_, EventInterface& events_interface_,
|
||||
NvCore::Container& core_)
|
||||
: nvdevice{system_}, events_interface{events_interface_}, core{core_},
|
||||
syncpoint_manager{core_.GetSyncpointManager()}, nvmap{core.GetNvMapFile()},
|
||||
channel_state{system.GPU().AllocateChannel()} {
|
||||
channel_syncpoint = syncpoint_manager.AllocateSyncpoint(false);
|
||||
sm_exception_breakpoint_int_report_event =
|
||||
events_interface.CreateEvent("GpuChannelSMExceptionBreakpointInt");
|
||||
sm_exception_breakpoint_pause_report_event =
|
||||
events_interface.CreateEvent("GpuChannelSMExceptionBreakpointPause");
|
||||
error_notifier_event = events_interface.CreateEvent("GpuChannelErrorNotifier");
|
||||
}
|
||||
|
||||
nvhost_gpu::~nvhost_gpu() {
|
||||
events_interface.FreeEvent(sm_exception_breakpoint_int_report_event);
|
||||
events_interface.FreeEvent(sm_exception_breakpoint_pause_report_event);
|
||||
events_interface.FreeEvent(error_notifier_event);
|
||||
syncpoint_manager.FreeSyncpoint(channel_syncpoint);
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
switch (command.group) {
|
||||
case 0x0:
|
||||
switch (command.cmd) {
|
||||
case 0x3:
|
||||
return GetWaitbase(input, output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 'H':
|
||||
switch (command.cmd) {
|
||||
case 0x1:
|
||||
return SetNVMAPfd(input, output);
|
||||
case 0x3:
|
||||
return ChannelSetTimeout(input, output);
|
||||
case 0x8:
|
||||
return SubmitGPFIFOBase(input, output, false);
|
||||
case 0x9:
|
||||
return AllocateObjectContext(input, output);
|
||||
case 0xb:
|
||||
return ZCullBind(input, output);
|
||||
case 0xc:
|
||||
return SetErrorNotifier(input, output);
|
||||
case 0xd:
|
||||
return SetChannelPriority(input, output);
|
||||
case 0x1a:
|
||||
return AllocGPFIFOEx2(input, output);
|
||||
case 0x1b:
|
||||
return SubmitGPFIFOBase(input, output, true);
|
||||
case 0x1d:
|
||||
return ChannelSetTimeslice(input, output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 'G':
|
||||
switch (command.cmd) {
|
||||
case 0x14:
|
||||
return SetClientData(input, output);
|
||||
case 0x15:
|
||||
return GetClientData(input, output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
};
|
||||
|
||||
NvResult nvhost_gpu::Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) {
|
||||
switch (command.group) {
|
||||
case 'H':
|
||||
switch (command.cmd) {
|
||||
case 0x1b:
|
||||
return SubmitGPFIFOBase(input, inline_input, output);
|
||||
}
|
||||
break;
|
||||
}
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
void nvhost_gpu::OnOpen(DeviceFD fd) {}
|
||||
void nvhost_gpu::OnClose(DeviceFD fd) {}
|
||||
|
||||
NvResult nvhost_gpu::SetNVMAPfd(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlSetNvmapFD params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
LOG_DEBUG(Service_NVDRV, "called, fd={}", params.nvmap_fd);
|
||||
|
||||
nvmap_fd = params.nvmap_fd;
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::SetClientData(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
|
||||
IoctlClientData params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
user_data = params.data;
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::GetClientData(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
|
||||
IoctlClientData params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
params.data = user_data;
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::ZCullBind(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
std::memcpy(&zcull_params, input.data(), input.size());
|
||||
LOG_DEBUG(Service_NVDRV, "called, gpu_va={:X}, mode={:X}", zcull_params.gpu_va,
|
||||
zcull_params.mode);
|
||||
|
||||
std::memcpy(output.data(), &zcull_params, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::SetErrorNotifier(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlSetErrorNotifier params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
LOG_WARNING(Service_NVDRV, "(STUBBED) called, offset={:X}, size={:X}, mem={:X}", params.offset,
|
||||
params.size, params.mem);
|
||||
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::SetChannelPriority(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
std::memcpy(&channel_priority, input.data(), input.size());
|
||||
LOG_DEBUG(Service_NVDRV, "(STUBBED) called, priority={:X}", channel_priority);
|
||||
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::AllocGPFIFOEx2(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlAllocGpfifoEx2 params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
LOG_WARNING(Service_NVDRV,
|
||||
"(STUBBED) called, num_entries={:X}, flags={:X}, unk0={:X}, "
|
||||
"unk1={:X}, unk2={:X}, unk3={:X}",
|
||||
params.num_entries, params.flags, params.unk0, params.unk1, params.unk2,
|
||||
params.unk3);
|
||||
|
||||
if (channel_state->initialized) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Already allocated!");
|
||||
return NvResult::AlreadyAllocated;
|
||||
}
|
||||
|
||||
system.GPU().InitChannel(*channel_state);
|
||||
|
||||
params.fence_out = syncpoint_manager.GetSyncpointFence(channel_syncpoint);
|
||||
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::AllocateObjectContext(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlAllocObjCtx params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
LOG_WARNING(Service_NVDRV, "(STUBBED) called, class_num={:X}, flags={:X}", params.class_num,
|
||||
params.flags);
|
||||
|
||||
params.obj_id = 0x0;
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
static std::vector<Tegra::CommandHeader> BuildWaitCommandList(NvFence fence) {
|
||||
return {
|
||||
Tegra::BuildCommandHeader(Tegra::BufferMethods::SyncpointPayload, 1,
|
||||
Tegra::SubmissionMode::Increasing),
|
||||
{fence.value},
|
||||
Tegra::BuildCommandHeader(Tegra::BufferMethods::SyncpointOperation, 1,
|
||||
Tegra::SubmissionMode::Increasing),
|
||||
BuildFenceAction(Tegra::Engines::Puller::FenceOperation::Acquire, fence.id),
|
||||
};
|
||||
}
|
||||
|
||||
static std::vector<Tegra::CommandHeader> BuildIncrementCommandList(NvFence fence) {
|
||||
std::vector<Tegra::CommandHeader> result{
|
||||
Tegra::BuildCommandHeader(Tegra::BufferMethods::SyncpointPayload, 1,
|
||||
Tegra::SubmissionMode::Increasing),
|
||||
{}};
|
||||
|
||||
for (u32 count = 0; count < 2; ++count) {
|
||||
result.emplace_back(Tegra::BuildCommandHeader(Tegra::BufferMethods::SyncpointOperation, 1,
|
||||
Tegra::SubmissionMode::Increasing));
|
||||
result.emplace_back(
|
||||
BuildFenceAction(Tegra::Engines::Puller::FenceOperation::Increment, fence.id));
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
static std::vector<Tegra::CommandHeader> BuildIncrementWithWfiCommandList(NvFence fence) {
|
||||
std::vector<Tegra::CommandHeader> result{
|
||||
Tegra::BuildCommandHeader(Tegra::BufferMethods::WaitForIdle, 1,
|
||||
Tegra::SubmissionMode::Increasing),
|
||||
{}};
|
||||
const std::vector<Tegra::CommandHeader> increment{BuildIncrementCommandList(fence)};
|
||||
|
||||
result.insert(result.end(), increment.begin(), increment.end());
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::SubmitGPFIFOImpl(IoctlSubmitGpfifo& params, std::vector<u8>& output,
|
||||
Tegra::CommandList&& entries) {
|
||||
LOG_TRACE(Service_NVDRV, "called, gpfifo={:X}, num_entries={:X}, flags={:X}", params.address,
|
||||
params.num_entries, params.flags.raw);
|
||||
|
||||
auto& gpu = system.GPU();
|
||||
|
||||
std::scoped_lock lock(channel_mutex);
|
||||
|
||||
const auto bind_id = channel_state->bind_id;
|
||||
|
||||
auto& flags = params.flags;
|
||||
|
||||
if (flags.fence_wait.Value()) {
|
||||
if (flags.increment_value.Value()) {
|
||||
return NvResult::BadParameter;
|
||||
}
|
||||
|
||||
if (!syncpoint_manager.IsFenceSignalled(params.fence)) {
|
||||
gpu.PushGPUEntries(bind_id, Tegra::CommandList{BuildWaitCommandList(params.fence)});
|
||||
}
|
||||
}
|
||||
|
||||
params.fence.id = channel_syncpoint;
|
||||
|
||||
u32 increment{(flags.fence_increment.Value() != 0 ? 2 : 0) +
|
||||
(flags.increment_value.Value() != 0 ? params.fence.value : 0)};
|
||||
params.fence.value = syncpoint_manager.IncrementSyncpointMaxExt(channel_syncpoint, increment);
|
||||
gpu.PushGPUEntries(bind_id, std::move(entries));
|
||||
|
||||
if (flags.fence_increment.Value()) {
|
||||
if (flags.suppress_wfi.Value()) {
|
||||
gpu.PushGPUEntries(bind_id,
|
||||
Tegra::CommandList{BuildIncrementCommandList(params.fence)});
|
||||
} else {
|
||||
gpu.PushGPUEntries(bind_id,
|
||||
Tegra::CommandList{BuildIncrementWithWfiCommandList(params.fence)});
|
||||
}
|
||||
}
|
||||
|
||||
flags.raw = 0;
|
||||
|
||||
std::memcpy(output.data(), ¶ms, sizeof(IoctlSubmitGpfifo));
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::SubmitGPFIFOBase(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
bool kickoff) {
|
||||
if (input.size() < sizeof(IoctlSubmitGpfifo)) {
|
||||
UNIMPLEMENTED();
|
||||
return NvResult::InvalidSize;
|
||||
}
|
||||
IoctlSubmitGpfifo params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlSubmitGpfifo));
|
||||
Tegra::CommandList entries(params.num_entries);
|
||||
|
||||
if (kickoff) {
|
||||
system.Memory().ReadBlock(params.address, entries.command_lists.data(),
|
||||
params.num_entries * sizeof(Tegra::CommandListHeader));
|
||||
} else {
|
||||
std::memcpy(entries.command_lists.data(), &input[sizeof(IoctlSubmitGpfifo)],
|
||||
params.num_entries * sizeof(Tegra::CommandListHeader));
|
||||
}
|
||||
|
||||
return SubmitGPFIFOImpl(params, output, std::move(entries));
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::SubmitGPFIFOBase(const std::vector<u8>& input,
|
||||
const std::vector<u8>& input_inline,
|
||||
std::vector<u8>& output) {
|
||||
if (input.size() < sizeof(IoctlSubmitGpfifo)) {
|
||||
UNIMPLEMENTED();
|
||||
return NvResult::InvalidSize;
|
||||
}
|
||||
IoctlSubmitGpfifo params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlSubmitGpfifo));
|
||||
Tegra::CommandList entries(params.num_entries);
|
||||
std::memcpy(entries.command_lists.data(), input_inline.data(), input_inline.size());
|
||||
return SubmitGPFIFOImpl(params, output, std::move(entries));
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::GetWaitbase(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlGetWaitbase params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlGetWaitbase));
|
||||
LOG_INFO(Service_NVDRV, "called, unknown=0x{:X}", params.unknown);
|
||||
|
||||
params.value = 0; // Seems to be hard coded at 0
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::ChannelSetTimeout(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlChannelSetTimeout params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlChannelSetTimeout));
|
||||
LOG_INFO(Service_NVDRV, "called, timeout=0x{:X}", params.timeout);
|
||||
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::ChannelSetTimeslice(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlSetTimeslice params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlSetTimeslice));
|
||||
LOG_INFO(Service_NVDRV, "called, timeslice=0x{:X}", params.timeslice);
|
||||
|
||||
channel_timeslice = params.timeslice;
|
||||
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
Kernel::KEvent* nvhost_gpu::QueryEvent(u32 event_id) {
|
||||
switch (event_id) {
|
||||
case 1:
|
||||
return sm_exception_breakpoint_int_report_event;
|
||||
case 2:
|
||||
return sm_exception_breakpoint_pause_report_event;
|
||||
case 3:
|
||||
return error_notifier_event;
|
||||
default: {
|
||||
LOG_CRITICAL(Service_NVDRV, "Unknown Ctrl GPU Event {}", event_id);
|
||||
}
|
||||
}
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include <cstring>
|
||||
#include "common/assert.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "core/core.h"
|
||||
#include "core/hle/service/nvdrv/core/container.h"
|
||||
#include "core/hle/service/nvdrv/core/nvmap.h"
|
||||
#include "core/hle/service/nvdrv/core/syncpoint_manager.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_gpu.h"
|
||||
#include "core/hle/service/nvdrv/nvdrv.h"
|
||||
#include "core/memory.h"
|
||||
#include "video_core/control/channel_state.h"
|
||||
#include "video_core/engines/puller.h"
|
||||
#include "video_core/gpu.h"
|
||||
#include "video_core/host1x/host1x.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
namespace {
|
||||
Tegra::CommandHeader BuildFenceAction(Tegra::Engines::Puller::FenceOperation op, u32 syncpoint_id) {
|
||||
Tegra::Engines::Puller::FenceAction result{};
|
||||
result.op.Assign(op);
|
||||
result.syncpoint_id.Assign(syncpoint_id);
|
||||
return {result.raw};
|
||||
}
|
||||
} // namespace
|
||||
|
||||
nvhost_gpu::nvhost_gpu(Core::System& system_, EventInterface& events_interface_,
|
||||
NvCore::Container& core_)
|
||||
: nvdevice{system_}, events_interface{events_interface_}, core{core_},
|
||||
syncpoint_manager{core_.GetSyncpointManager()}, nvmap{core.GetNvMapFile()},
|
||||
channel_state{system.GPU().AllocateChannel()} {
|
||||
channel_syncpoint = syncpoint_manager.AllocateSyncpoint(false);
|
||||
sm_exception_breakpoint_int_report_event =
|
||||
events_interface.CreateEvent("GpuChannelSMExceptionBreakpointInt");
|
||||
sm_exception_breakpoint_pause_report_event =
|
||||
events_interface.CreateEvent("GpuChannelSMExceptionBreakpointPause");
|
||||
error_notifier_event = events_interface.CreateEvent("GpuChannelErrorNotifier");
|
||||
}
|
||||
|
||||
nvhost_gpu::~nvhost_gpu() {
|
||||
events_interface.FreeEvent(sm_exception_breakpoint_int_report_event);
|
||||
events_interface.FreeEvent(sm_exception_breakpoint_pause_report_event);
|
||||
events_interface.FreeEvent(error_notifier_event);
|
||||
syncpoint_manager.FreeSyncpoint(channel_syncpoint);
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
switch (command.group) {
|
||||
case 0x0:
|
||||
switch (command.cmd) {
|
||||
case 0x3:
|
||||
return GetWaitbase(input, output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 'H':
|
||||
switch (command.cmd) {
|
||||
case 0x1:
|
||||
return SetNVMAPfd(input, output);
|
||||
case 0x3:
|
||||
return ChannelSetTimeout(input, output);
|
||||
case 0x8:
|
||||
return SubmitGPFIFOBase(input, output, false);
|
||||
case 0x9:
|
||||
return AllocateObjectContext(input, output);
|
||||
case 0xb:
|
||||
return ZCullBind(input, output);
|
||||
case 0xc:
|
||||
return SetErrorNotifier(input, output);
|
||||
case 0xd:
|
||||
return SetChannelPriority(input, output);
|
||||
case 0x1a:
|
||||
return AllocGPFIFOEx2(input, output);
|
||||
case 0x1b:
|
||||
return SubmitGPFIFOBase(input, output, true);
|
||||
case 0x1d:
|
||||
return ChannelSetTimeslice(input, output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 'G':
|
||||
switch (command.cmd) {
|
||||
case 0x14:
|
||||
return SetClientData(input, output);
|
||||
case 0x15:
|
||||
return GetClientData(input, output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
};
|
||||
|
||||
NvResult nvhost_gpu::Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) {
|
||||
switch (command.group) {
|
||||
case 'H':
|
||||
switch (command.cmd) {
|
||||
case 0x1b:
|
||||
return SubmitGPFIFOBase(input, inline_input, output);
|
||||
}
|
||||
break;
|
||||
}
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
void nvhost_gpu::OnOpen(DeviceFD fd) {}
|
||||
void nvhost_gpu::OnClose(DeviceFD fd) {}
|
||||
|
||||
NvResult nvhost_gpu::SetNVMAPfd(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlSetNvmapFD params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
LOG_DEBUG(Service_NVDRV, "called, fd={}", params.nvmap_fd);
|
||||
|
||||
nvmap_fd = params.nvmap_fd;
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::SetClientData(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
|
||||
IoctlClientData params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
user_data = params.data;
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::GetClientData(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
|
||||
IoctlClientData params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
params.data = user_data;
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::ZCullBind(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
std::memcpy(&zcull_params, input.data(), input.size());
|
||||
LOG_DEBUG(Service_NVDRV, "called, gpu_va={:X}, mode={:X}", zcull_params.gpu_va,
|
||||
zcull_params.mode);
|
||||
|
||||
std::memcpy(output.data(), &zcull_params, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::SetErrorNotifier(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlSetErrorNotifier params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
LOG_WARNING(Service_NVDRV, "(STUBBED) called, offset={:X}, size={:X}, mem={:X}", params.offset,
|
||||
params.size, params.mem);
|
||||
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::SetChannelPriority(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
std::memcpy(&channel_priority, input.data(), input.size());
|
||||
LOG_DEBUG(Service_NVDRV, "(STUBBED) called, priority={:X}", channel_priority);
|
||||
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::AllocGPFIFOEx2(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlAllocGpfifoEx2 params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
LOG_WARNING(Service_NVDRV,
|
||||
"(STUBBED) called, num_entries={:X}, flags={:X}, unk0={:X}, "
|
||||
"unk1={:X}, unk2={:X}, unk3={:X}",
|
||||
params.num_entries, params.flags, params.unk0, params.unk1, params.unk2,
|
||||
params.unk3);
|
||||
|
||||
if (channel_state->initialized) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Already allocated!");
|
||||
return NvResult::AlreadyAllocated;
|
||||
}
|
||||
|
||||
system.GPU().InitChannel(*channel_state);
|
||||
|
||||
params.fence_out = syncpoint_manager.GetSyncpointFence(channel_syncpoint);
|
||||
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::AllocateObjectContext(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlAllocObjCtx params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
LOG_WARNING(Service_NVDRV, "(STUBBED) called, class_num={:X}, flags={:X}", params.class_num,
|
||||
params.flags);
|
||||
|
||||
params.obj_id = 0x0;
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
static std::vector<Tegra::CommandHeader> BuildWaitCommandList(NvFence fence) {
|
||||
return {
|
||||
Tegra::BuildCommandHeader(Tegra::BufferMethods::SyncpointPayload, 1,
|
||||
Tegra::SubmissionMode::Increasing),
|
||||
{fence.value},
|
||||
Tegra::BuildCommandHeader(Tegra::BufferMethods::SyncpointOperation, 1,
|
||||
Tegra::SubmissionMode::Increasing),
|
||||
BuildFenceAction(Tegra::Engines::Puller::FenceOperation::Acquire, fence.id),
|
||||
};
|
||||
}
|
||||
|
||||
static std::vector<Tegra::CommandHeader> BuildIncrementCommandList(NvFence fence) {
|
||||
std::vector<Tegra::CommandHeader> result{
|
||||
Tegra::BuildCommandHeader(Tegra::BufferMethods::SyncpointPayload, 1,
|
||||
Tegra::SubmissionMode::Increasing),
|
||||
{}};
|
||||
|
||||
for (u32 count = 0; count < 2; ++count) {
|
||||
result.emplace_back(Tegra::BuildCommandHeader(Tegra::BufferMethods::SyncpointOperation, 1,
|
||||
Tegra::SubmissionMode::Increasing));
|
||||
result.emplace_back(
|
||||
BuildFenceAction(Tegra::Engines::Puller::FenceOperation::Increment, fence.id));
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
static std::vector<Tegra::CommandHeader> BuildIncrementWithWfiCommandList(NvFence fence) {
|
||||
std::vector<Tegra::CommandHeader> result{
|
||||
Tegra::BuildCommandHeader(Tegra::BufferMethods::WaitForIdle, 1,
|
||||
Tegra::SubmissionMode::Increasing),
|
||||
{}};
|
||||
const std::vector<Tegra::CommandHeader> increment{BuildIncrementCommandList(fence)};
|
||||
|
||||
result.insert(result.end(), increment.begin(), increment.end());
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::SubmitGPFIFOImpl(IoctlSubmitGpfifo& params, std::vector<u8>& output,
|
||||
Tegra::CommandList&& entries) {
|
||||
LOG_TRACE(Service_NVDRV, "called, gpfifo={:X}, num_entries={:X}, flags={:X}", params.address,
|
||||
params.num_entries, params.flags.raw);
|
||||
|
||||
auto& gpu = system.GPU();
|
||||
|
||||
std::scoped_lock lock(channel_mutex);
|
||||
|
||||
const auto bind_id = channel_state->bind_id;
|
||||
|
||||
auto& flags = params.flags;
|
||||
|
||||
if (flags.fence_wait.Value()) {
|
||||
if (flags.increment_value.Value()) {
|
||||
return NvResult::BadParameter;
|
||||
}
|
||||
|
||||
if (!syncpoint_manager.IsFenceSignalled(params.fence)) {
|
||||
gpu.PushGPUEntries(bind_id, Tegra::CommandList{BuildWaitCommandList(params.fence)});
|
||||
}
|
||||
}
|
||||
|
||||
params.fence.id = channel_syncpoint;
|
||||
|
||||
u32 increment{(flags.fence_increment.Value() != 0 ? 2 : 0) +
|
||||
(flags.increment_value.Value() != 0 ? params.fence.value : 0)};
|
||||
params.fence.value = syncpoint_manager.IncrementSyncpointMaxExt(channel_syncpoint, increment);
|
||||
gpu.PushGPUEntries(bind_id, std::move(entries));
|
||||
|
||||
if (flags.fence_increment.Value()) {
|
||||
if (flags.suppress_wfi.Value()) {
|
||||
gpu.PushGPUEntries(bind_id,
|
||||
Tegra::CommandList{BuildIncrementCommandList(params.fence)});
|
||||
} else {
|
||||
gpu.PushGPUEntries(bind_id,
|
||||
Tegra::CommandList{BuildIncrementWithWfiCommandList(params.fence)});
|
||||
}
|
||||
}
|
||||
|
||||
flags.raw = 0;
|
||||
|
||||
std::memcpy(output.data(), ¶ms, sizeof(IoctlSubmitGpfifo));
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::SubmitGPFIFOBase(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
bool kickoff) {
|
||||
if (input.size() < sizeof(IoctlSubmitGpfifo)) {
|
||||
UNIMPLEMENTED();
|
||||
return NvResult::InvalidSize;
|
||||
}
|
||||
IoctlSubmitGpfifo params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlSubmitGpfifo));
|
||||
Tegra::CommandList entries(params.num_entries);
|
||||
|
||||
if (kickoff) {
|
||||
system.Memory().ReadBlock(params.address, entries.command_lists.data(),
|
||||
params.num_entries * sizeof(Tegra::CommandListHeader));
|
||||
} else {
|
||||
std::memcpy(entries.command_lists.data(), &input[sizeof(IoctlSubmitGpfifo)],
|
||||
params.num_entries * sizeof(Tegra::CommandListHeader));
|
||||
}
|
||||
|
||||
return SubmitGPFIFOImpl(params, output, std::move(entries));
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::SubmitGPFIFOBase(const std::vector<u8>& input,
|
||||
const std::vector<u8>& input_inline,
|
||||
std::vector<u8>& output) {
|
||||
if (input.size() < sizeof(IoctlSubmitGpfifo)) {
|
||||
UNIMPLEMENTED();
|
||||
return NvResult::InvalidSize;
|
||||
}
|
||||
IoctlSubmitGpfifo params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlSubmitGpfifo));
|
||||
Tegra::CommandList entries(params.num_entries);
|
||||
std::memcpy(entries.command_lists.data(), input_inline.data(), input_inline.size());
|
||||
return SubmitGPFIFOImpl(params, output, std::move(entries));
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::GetWaitbase(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlGetWaitbase params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlGetWaitbase));
|
||||
LOG_INFO(Service_NVDRV, "called, unknown=0x{:X}", params.unknown);
|
||||
|
||||
params.value = 0; // Seems to be hard coded at 0
|
||||
std::memcpy(output.data(), ¶ms, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::ChannelSetTimeout(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlChannelSetTimeout params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlChannelSetTimeout));
|
||||
LOG_INFO(Service_NVDRV, "called, timeout=0x{:X}", params.timeout);
|
||||
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_gpu::ChannelSetTimeslice(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlSetTimeslice params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlSetTimeslice));
|
||||
LOG_INFO(Service_NVDRV, "called, timeslice=0x{:X}", params.timeslice);
|
||||
|
||||
channel_timeslice = params.timeslice;
|
||||
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
Kernel::KEvent* nvhost_gpu::QueryEvent(u32 event_id) {
|
||||
switch (event_id) {
|
||||
case 1:
|
||||
return sm_exception_breakpoint_int_report_event;
|
||||
case 2:
|
||||
return sm_exception_breakpoint_pause_report_event;
|
||||
case 3:
|
||||
return error_notifier_event;
|
||||
default: {
|
||||
LOG_CRITICAL(Service_NVDRV, "Unknown Ctrl GPU Event {}", event_id);
|
||||
}
|
||||
}
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
||||
@@ -1,221 +1,221 @@
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <memory>
|
||||
#include <vector>
|
||||
#include "common/bit_field.h"
|
||||
#include "common/common_funcs.h"
|
||||
#include "common/common_types.h"
|
||||
#include "common/swap.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvdevice.h"
|
||||
#include "core/hle/service/nvdrv/nvdata.h"
|
||||
#include "video_core/dma_pusher.h"
|
||||
|
||||
namespace Tegra {
|
||||
namespace Control {
|
||||
struct ChannelState;
|
||||
}
|
||||
} // namespace Tegra
|
||||
|
||||
namespace Service::Nvidia {
|
||||
|
||||
namespace NvCore {
|
||||
class Container;
|
||||
class NvMap;
|
||||
class SyncpointManager;
|
||||
} // namespace NvCore
|
||||
|
||||
class EventInterface;
|
||||
} // namespace Service::Nvidia
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
class nvhost_as_gpu;
|
||||
class nvmap;
|
||||
class nvhost_gpu final : public nvdevice {
|
||||
public:
|
||||
explicit nvhost_gpu(Core::System& system_, EventInterface& events_interface_,
|
||||
NvCore::Container& core);
|
||||
~nvhost_gpu() override;
|
||||
|
||||
NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) override;
|
||||
NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) override;
|
||||
NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) override;
|
||||
|
||||
void OnOpen(DeviceFD fd) override;
|
||||
void OnClose(DeviceFD fd) override;
|
||||
|
||||
Kernel::KEvent* QueryEvent(u32 event_id) override;
|
||||
|
||||
private:
|
||||
friend class nvhost_as_gpu;
|
||||
enum class CtxObjects : u32_le {
|
||||
Ctx2D = 0x902D,
|
||||
Ctx3D = 0xB197,
|
||||
CtxCompute = 0xB1C0,
|
||||
CtxKepler = 0xA140,
|
||||
CtxDMA = 0xB0B5,
|
||||
CtxChannelGPFIFO = 0xB06F,
|
||||
};
|
||||
|
||||
struct IoctlSetNvmapFD {
|
||||
s32_le nvmap_fd{};
|
||||
};
|
||||
static_assert(sizeof(IoctlSetNvmapFD) == 4, "IoctlSetNvmapFD is incorrect size");
|
||||
|
||||
struct IoctlChannelSetTimeout {
|
||||
u32_le timeout{};
|
||||
};
|
||||
static_assert(sizeof(IoctlChannelSetTimeout) == 4, "IoctlChannelSetTimeout is incorrect size");
|
||||
|
||||
struct IoctlAllocGPFIFO {
|
||||
u32_le num_entries{};
|
||||
u32_le flags{};
|
||||
};
|
||||
static_assert(sizeof(IoctlAllocGPFIFO) == 8, "IoctlAllocGPFIFO is incorrect size");
|
||||
|
||||
struct IoctlClientData {
|
||||
u64_le data{};
|
||||
};
|
||||
static_assert(sizeof(IoctlClientData) == 8, "IoctlClientData is incorrect size");
|
||||
|
||||
struct IoctlZCullBind {
|
||||
u64_le gpu_va{};
|
||||
u32_le mode{}; // 0=global, 1=no_ctxsw, 2=separate_buffer, 3=part_of_regular_buf
|
||||
INSERT_PADDING_WORDS(1);
|
||||
};
|
||||
static_assert(sizeof(IoctlZCullBind) == 16, "IoctlZCullBind is incorrect size");
|
||||
|
||||
struct IoctlSetErrorNotifier {
|
||||
u64_le offset{};
|
||||
u64_le size{};
|
||||
u32_le mem{}; // nvmap object handle
|
||||
INSERT_PADDING_WORDS(1);
|
||||
};
|
||||
static_assert(sizeof(IoctlSetErrorNotifier) == 24, "IoctlSetErrorNotifier is incorrect size");
|
||||
|
||||
struct IoctlChannelSetPriority {
|
||||
u32_le priority{};
|
||||
};
|
||||
static_assert(sizeof(IoctlChannelSetPriority) == 4,
|
||||
"IoctlChannelSetPriority is incorrect size");
|
||||
|
||||
struct IoctlSetTimeslice {
|
||||
u32_le timeslice{};
|
||||
};
|
||||
static_assert(sizeof(IoctlSetTimeslice) == 4, "IoctlSetTimeslice is incorrect size");
|
||||
|
||||
struct IoctlEventIdControl {
|
||||
u32_le cmd{}; // 0=disable, 1=enable, 2=clear
|
||||
u32_le id{};
|
||||
};
|
||||
static_assert(sizeof(IoctlEventIdControl) == 8, "IoctlEventIdControl is incorrect size");
|
||||
|
||||
struct IoctlGetErrorNotification {
|
||||
u64_le timestamp{};
|
||||
u32_le info32{};
|
||||
u16_le info16{};
|
||||
u16_le status{}; // always 0xFFFF
|
||||
};
|
||||
static_assert(sizeof(IoctlGetErrorNotification) == 16,
|
||||
"IoctlGetErrorNotification is incorrect size");
|
||||
|
||||
static_assert(sizeof(NvFence) == 8, "Fence is incorrect size");
|
||||
|
||||
struct IoctlAllocGpfifoEx {
|
||||
u32_le num_entries{};
|
||||
u32_le flags{};
|
||||
u32_le unk0{};
|
||||
u32_le unk1{};
|
||||
u32_le unk2{};
|
||||
u32_le unk3{};
|
||||
u32_le unk4{};
|
||||
u32_le unk5{};
|
||||
};
|
||||
static_assert(sizeof(IoctlAllocGpfifoEx) == 32, "IoctlAllocGpfifoEx is incorrect size");
|
||||
|
||||
struct IoctlAllocGpfifoEx2 {
|
||||
u32_le num_entries{}; // in
|
||||
u32_le flags{}; // in
|
||||
u32_le unk0{}; // in (1 works)
|
||||
NvFence fence_out{}; // out
|
||||
u32_le unk1{}; // in
|
||||
u32_le unk2{}; // in
|
||||
u32_le unk3{}; // in
|
||||
};
|
||||
static_assert(sizeof(IoctlAllocGpfifoEx2) == 32, "IoctlAllocGpfifoEx2 is incorrect size");
|
||||
|
||||
struct IoctlAllocObjCtx {
|
||||
u32_le class_num{}; // 0x902D=2d, 0xB197=3d, 0xB1C0=compute, 0xA140=kepler, 0xB0B5=DMA,
|
||||
// 0xB06F=channel_gpfifo
|
||||
u32_le flags{};
|
||||
u64_le obj_id{}; // (ignored) used for FREE_OBJ_CTX ioctl, which is not supported
|
||||
};
|
||||
static_assert(sizeof(IoctlAllocObjCtx) == 16, "IoctlAllocObjCtx is incorrect size");
|
||||
|
||||
struct IoctlSubmitGpfifo {
|
||||
u64_le address{}; // pointer to gpfifo entry structs
|
||||
u32_le num_entries{}; // number of fence objects being submitted
|
||||
union {
|
||||
u32_le raw;
|
||||
BitField<0, 1, u32_le> fence_wait; // append a wait sync_point to the list
|
||||
BitField<1, 1, u32_le> fence_increment; // append an increment to the list
|
||||
BitField<2, 1, u32_le> new_hw_format; // mostly ignored
|
||||
BitField<4, 1, u32_le> suppress_wfi; // suppress wait for interrupt
|
||||
BitField<8, 1, u32_le> increment_value; // increment the returned fence
|
||||
} flags;
|
||||
NvFence fence{}; // returned new fence object for others to wait on
|
||||
};
|
||||
static_assert(sizeof(IoctlSubmitGpfifo) == 16 + sizeof(NvFence),
|
||||
"IoctlSubmitGpfifo is incorrect size");
|
||||
|
||||
struct IoctlGetWaitbase {
|
||||
u32 unknown{}; // seems to be ignored? Nintendo added this
|
||||
u32 value{};
|
||||
};
|
||||
static_assert(sizeof(IoctlGetWaitbase) == 8, "IoctlGetWaitbase is incorrect size");
|
||||
|
||||
s32_le nvmap_fd{};
|
||||
u64_le user_data{};
|
||||
IoctlZCullBind zcull_params{};
|
||||
u32_le channel_priority{};
|
||||
u32_le channel_timeslice{};
|
||||
|
||||
NvResult SetNVMAPfd(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult SetClientData(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult GetClientData(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult ZCullBind(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult SetErrorNotifier(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult SetChannelPriority(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult AllocGPFIFOEx2(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult AllocateObjectContext(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult SubmitGPFIFOImpl(IoctlSubmitGpfifo& params, std::vector<u8>& output,
|
||||
Tegra::CommandList&& entries);
|
||||
NvResult SubmitGPFIFOBase(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
bool kickoff = false);
|
||||
NvResult SubmitGPFIFOBase(const std::vector<u8>& input, const std::vector<u8>& input_inline,
|
||||
std::vector<u8>& output);
|
||||
NvResult GetWaitbase(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult ChannelSetTimeout(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult ChannelSetTimeslice(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
|
||||
EventInterface& events_interface;
|
||||
NvCore::Container& core;
|
||||
NvCore::SyncpointManager& syncpoint_manager;
|
||||
NvCore::NvMap& nvmap;
|
||||
std::shared_ptr<Tegra::Control::ChannelState> channel_state;
|
||||
u32 channel_syncpoint;
|
||||
std::mutex channel_mutex;
|
||||
|
||||
// Events
|
||||
Kernel::KEvent* sm_exception_breakpoint_int_report_event;
|
||||
Kernel::KEvent* sm_exception_breakpoint_pause_report_event;
|
||||
Kernel::KEvent* error_notifier_event;
|
||||
};
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <memory>
|
||||
#include <vector>
|
||||
#include "common/bit_field.h"
|
||||
#include "common/common_funcs.h"
|
||||
#include "common/common_types.h"
|
||||
#include "common/swap.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvdevice.h"
|
||||
#include "core/hle/service/nvdrv/nvdata.h"
|
||||
#include "video_core/dma_pusher.h"
|
||||
|
||||
namespace Tegra {
|
||||
namespace Control {
|
||||
struct ChannelState;
|
||||
}
|
||||
} // namespace Tegra
|
||||
|
||||
namespace Service::Nvidia {
|
||||
|
||||
namespace NvCore {
|
||||
class Container;
|
||||
class NvMap;
|
||||
class SyncpointManager;
|
||||
} // namespace NvCore
|
||||
|
||||
class EventInterface;
|
||||
} // namespace Service::Nvidia
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
class nvhost_as_gpu;
|
||||
class nvmap;
|
||||
class nvhost_gpu final : public nvdevice {
|
||||
public:
|
||||
explicit nvhost_gpu(Core::System& system_, EventInterface& events_interface_,
|
||||
NvCore::Container& core);
|
||||
~nvhost_gpu() override;
|
||||
|
||||
NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) override;
|
||||
NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) override;
|
||||
NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) override;
|
||||
|
||||
void OnOpen(DeviceFD fd) override;
|
||||
void OnClose(DeviceFD fd) override;
|
||||
|
||||
Kernel::KEvent* QueryEvent(u32 event_id) override;
|
||||
|
||||
private:
|
||||
friend class nvhost_as_gpu;
|
||||
enum class CtxObjects : u32_le {
|
||||
Ctx2D = 0x902D,
|
||||
Ctx3D = 0xB197,
|
||||
CtxCompute = 0xB1C0,
|
||||
CtxKepler = 0xA140,
|
||||
CtxDMA = 0xB0B5,
|
||||
CtxChannelGPFIFO = 0xB06F,
|
||||
};
|
||||
|
||||
struct IoctlSetNvmapFD {
|
||||
s32_le nvmap_fd{};
|
||||
};
|
||||
static_assert(sizeof(IoctlSetNvmapFD) == 4, "IoctlSetNvmapFD is incorrect size");
|
||||
|
||||
struct IoctlChannelSetTimeout {
|
||||
u32_le timeout{};
|
||||
};
|
||||
static_assert(sizeof(IoctlChannelSetTimeout) == 4, "IoctlChannelSetTimeout is incorrect size");
|
||||
|
||||
struct IoctlAllocGPFIFO {
|
||||
u32_le num_entries{};
|
||||
u32_le flags{};
|
||||
};
|
||||
static_assert(sizeof(IoctlAllocGPFIFO) == 8, "IoctlAllocGPFIFO is incorrect size");
|
||||
|
||||
struct IoctlClientData {
|
||||
u64_le data{};
|
||||
};
|
||||
static_assert(sizeof(IoctlClientData) == 8, "IoctlClientData is incorrect size");
|
||||
|
||||
struct IoctlZCullBind {
|
||||
u64_le gpu_va{};
|
||||
u32_le mode{}; // 0=global, 1=no_ctxsw, 2=separate_buffer, 3=part_of_regular_buf
|
||||
INSERT_PADDING_WORDS(1);
|
||||
};
|
||||
static_assert(sizeof(IoctlZCullBind) == 16, "IoctlZCullBind is incorrect size");
|
||||
|
||||
struct IoctlSetErrorNotifier {
|
||||
u64_le offset{};
|
||||
u64_le size{};
|
||||
u32_le mem{}; // nvmap object handle
|
||||
INSERT_PADDING_WORDS(1);
|
||||
};
|
||||
static_assert(sizeof(IoctlSetErrorNotifier) == 24, "IoctlSetErrorNotifier is incorrect size");
|
||||
|
||||
struct IoctlChannelSetPriority {
|
||||
u32_le priority{};
|
||||
};
|
||||
static_assert(sizeof(IoctlChannelSetPriority) == 4,
|
||||
"IoctlChannelSetPriority is incorrect size");
|
||||
|
||||
struct IoctlSetTimeslice {
|
||||
u32_le timeslice{};
|
||||
};
|
||||
static_assert(sizeof(IoctlSetTimeslice) == 4, "IoctlSetTimeslice is incorrect size");
|
||||
|
||||
struct IoctlEventIdControl {
|
||||
u32_le cmd{}; // 0=disable, 1=enable, 2=clear
|
||||
u32_le id{};
|
||||
};
|
||||
static_assert(sizeof(IoctlEventIdControl) == 8, "IoctlEventIdControl is incorrect size");
|
||||
|
||||
struct IoctlGetErrorNotification {
|
||||
u64_le timestamp{};
|
||||
u32_le info32{};
|
||||
u16_le info16{};
|
||||
u16_le status{}; // always 0xFFFF
|
||||
};
|
||||
static_assert(sizeof(IoctlGetErrorNotification) == 16,
|
||||
"IoctlGetErrorNotification is incorrect size");
|
||||
|
||||
static_assert(sizeof(NvFence) == 8, "Fence is incorrect size");
|
||||
|
||||
struct IoctlAllocGpfifoEx {
|
||||
u32_le num_entries{};
|
||||
u32_le flags{};
|
||||
u32_le unk0{};
|
||||
u32_le unk1{};
|
||||
u32_le unk2{};
|
||||
u32_le unk3{};
|
||||
u32_le unk4{};
|
||||
u32_le unk5{};
|
||||
};
|
||||
static_assert(sizeof(IoctlAllocGpfifoEx) == 32, "IoctlAllocGpfifoEx is incorrect size");
|
||||
|
||||
struct IoctlAllocGpfifoEx2 {
|
||||
u32_le num_entries{}; // in
|
||||
u32_le flags{}; // in
|
||||
u32_le unk0{}; // in (1 works)
|
||||
NvFence fence_out{}; // out
|
||||
u32_le unk1{}; // in
|
||||
u32_le unk2{}; // in
|
||||
u32_le unk3{}; // in
|
||||
};
|
||||
static_assert(sizeof(IoctlAllocGpfifoEx2) == 32, "IoctlAllocGpfifoEx2 is incorrect size");
|
||||
|
||||
struct IoctlAllocObjCtx {
|
||||
u32_le class_num{}; // 0x902D=2d, 0xB197=3d, 0xB1C0=compute, 0xA140=kepler, 0xB0B5=DMA,
|
||||
// 0xB06F=channel_gpfifo
|
||||
u32_le flags{};
|
||||
u64_le obj_id{}; // (ignored) used for FREE_OBJ_CTX ioctl, which is not supported
|
||||
};
|
||||
static_assert(sizeof(IoctlAllocObjCtx) == 16, "IoctlAllocObjCtx is incorrect size");
|
||||
|
||||
struct IoctlSubmitGpfifo {
|
||||
u64_le address{}; // pointer to gpfifo entry structs
|
||||
u32_le num_entries{}; // number of fence objects being submitted
|
||||
union {
|
||||
u32_le raw;
|
||||
BitField<0, 1, u32_le> fence_wait; // append a wait sync_point to the list
|
||||
BitField<1, 1, u32_le> fence_increment; // append an increment to the list
|
||||
BitField<2, 1, u32_le> new_hw_format; // mostly ignored
|
||||
BitField<4, 1, u32_le> suppress_wfi; // suppress wait for interrupt
|
||||
BitField<8, 1, u32_le> increment_value; // increment the returned fence
|
||||
} flags;
|
||||
NvFence fence{}; // returned new fence object for others to wait on
|
||||
};
|
||||
static_assert(sizeof(IoctlSubmitGpfifo) == 16 + sizeof(NvFence),
|
||||
"IoctlSubmitGpfifo is incorrect size");
|
||||
|
||||
struct IoctlGetWaitbase {
|
||||
u32 unknown{}; // seems to be ignored? Nintendo added this
|
||||
u32 value{};
|
||||
};
|
||||
static_assert(sizeof(IoctlGetWaitbase) == 8, "IoctlGetWaitbase is incorrect size");
|
||||
|
||||
s32_le nvmap_fd{};
|
||||
u64_le user_data{};
|
||||
IoctlZCullBind zcull_params{};
|
||||
u32_le channel_priority{};
|
||||
u32_le channel_timeslice{};
|
||||
|
||||
NvResult SetNVMAPfd(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult SetClientData(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult GetClientData(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult ZCullBind(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult SetErrorNotifier(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult SetChannelPriority(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult AllocGPFIFOEx2(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult AllocateObjectContext(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult SubmitGPFIFOImpl(IoctlSubmitGpfifo& params, std::vector<u8>& output,
|
||||
Tegra::CommandList&& entries);
|
||||
NvResult SubmitGPFIFOBase(const std::vector<u8>& input, std::vector<u8>& output,
|
||||
bool kickoff = false);
|
||||
NvResult SubmitGPFIFOBase(const std::vector<u8>& input, const std::vector<u8>& input_inline,
|
||||
std::vector<u8>& output);
|
||||
NvResult GetWaitbase(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult ChannelSetTimeout(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult ChannelSetTimeslice(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
|
||||
EventInterface& events_interface;
|
||||
NvCore::Container& core;
|
||||
NvCore::SyncpointManager& syncpoint_manager;
|
||||
NvCore::NvMap& nvmap;
|
||||
std::shared_ptr<Tegra::Control::ChannelState> channel_state;
|
||||
u32 channel_syncpoint;
|
||||
std::mutex channel_mutex;
|
||||
|
||||
// Events
|
||||
Kernel::KEvent* sm_exception_breakpoint_int_report_event;
|
||||
Kernel::KEvent* sm_exception_breakpoint_pause_report_event;
|
||||
Kernel::KEvent* error_notifier_event;
|
||||
};
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
||||
@@ -1,85 +1,85 @@
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include "audio_core/audio_core.h"
|
||||
#include "common/assert.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "core/core.h"
|
||||
#include "core/hle/service/nvdrv/core/container.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_nvdec.h"
|
||||
#include "video_core/renderer_base.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
nvhost_nvdec::nvhost_nvdec(Core::System& system_, NvCore::Container& core_)
|
||||
: nvhost_nvdec_common{system_, core_, NvCore::ChannelType::NvDec} {}
|
||||
nvhost_nvdec::~nvhost_nvdec() = default;
|
||||
|
||||
NvResult nvhost_nvdec::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
switch (command.group) {
|
||||
case 0x0:
|
||||
switch (command.cmd) {
|
||||
case 0x1: {
|
||||
auto& host1x_file = core.Host1xDeviceFile();
|
||||
if (!host1x_file.fd_to_id.contains(fd)) {
|
||||
host1x_file.fd_to_id[fd] = host1x_file.nvdec_next_id++;
|
||||
}
|
||||
return Submit(fd, input, output);
|
||||
}
|
||||
case 0x2:
|
||||
return GetSyncpoint(input, output);
|
||||
case 0x3:
|
||||
return GetWaitbase(input, output);
|
||||
case 0x7:
|
||||
return SetSubmitTimeout(input, output);
|
||||
case 0x9:
|
||||
return MapBuffer(input, output);
|
||||
case 0xa:
|
||||
return UnmapBuffer(input, output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 'H':
|
||||
switch (command.cmd) {
|
||||
case 0x1:
|
||||
return SetNVMAPfd(input);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec::Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
void nvhost_nvdec::OnOpen(DeviceFD fd) {
|
||||
LOG_INFO(Service_NVDRV, "NVDEC video stream started");
|
||||
system.AudioCore().SetNVDECActive(true);
|
||||
}
|
||||
|
||||
void nvhost_nvdec::OnClose(DeviceFD fd) {
|
||||
LOG_INFO(Service_NVDRV, "NVDEC video stream ended");
|
||||
auto& host1x_file = core.Host1xDeviceFile();
|
||||
const auto iter = host1x_file.fd_to_id.find(fd);
|
||||
if (iter != host1x_file.fd_to_id.end()) {
|
||||
system.GPU().ClearCdmaInstance(iter->second);
|
||||
}
|
||||
system.AudioCore().SetNVDECActive(false);
|
||||
}
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include "audio_core/audio_core.h"
|
||||
#include "common/assert.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "core/core.h"
|
||||
#include "core/hle/service/nvdrv/core/container.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_nvdec.h"
|
||||
#include "video_core/renderer_base.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
nvhost_nvdec::nvhost_nvdec(Core::System& system_, NvCore::Container& core_)
|
||||
: nvhost_nvdec_common{system_, core_, NvCore::ChannelType::NvDec} {}
|
||||
nvhost_nvdec::~nvhost_nvdec() = default;
|
||||
|
||||
NvResult nvhost_nvdec::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
switch (command.group) {
|
||||
case 0x0:
|
||||
switch (command.cmd) {
|
||||
case 0x1: {
|
||||
auto& host1x_file = core.Host1xDeviceFile();
|
||||
if (!host1x_file.fd_to_id.contains(fd)) {
|
||||
host1x_file.fd_to_id[fd] = host1x_file.nvdec_next_id++;
|
||||
}
|
||||
return Submit(fd, input, output);
|
||||
}
|
||||
case 0x2:
|
||||
return GetSyncpoint(input, output);
|
||||
case 0x3:
|
||||
return GetWaitbase(input, output);
|
||||
case 0x7:
|
||||
return SetSubmitTimeout(input, output);
|
||||
case 0x9:
|
||||
return MapBuffer(input, output);
|
||||
case 0xa:
|
||||
return UnmapBuffer(input, output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 'H':
|
||||
switch (command.cmd) {
|
||||
case 0x1:
|
||||
return SetNVMAPfd(input);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec::Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
void nvhost_nvdec::OnOpen(DeviceFD fd) {
|
||||
LOG_INFO(Service_NVDRV, "NVDEC video stream started");
|
||||
system.AudioCore().SetNVDECActive(true);
|
||||
}
|
||||
|
||||
void nvhost_nvdec::OnClose(DeviceFD fd) {
|
||||
LOG_INFO(Service_NVDRV, "NVDEC video stream ended");
|
||||
auto& host1x_file = core.Host1xDeviceFile();
|
||||
const auto iter = host1x_file.fd_to_id.find(fd);
|
||||
if (iter != host1x_file.fd_to_id.end()) {
|
||||
system.GPU().ClearCdmaInstance(iter->second);
|
||||
}
|
||||
system.AudioCore().SetNVDECActive(false);
|
||||
}
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
||||
@@ -1,27 +1,27 @@
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <memory>
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_nvdec_common.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
class nvhost_nvdec final : public nvhost_nvdec_common {
|
||||
public:
|
||||
explicit nvhost_nvdec(Core::System& system_, NvCore::Container& core);
|
||||
~nvhost_nvdec() override;
|
||||
|
||||
NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) override;
|
||||
NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) override;
|
||||
NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) override;
|
||||
|
||||
void OnOpen(DeviceFD fd) override;
|
||||
void OnClose(DeviceFD fd) override;
|
||||
};
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <memory>
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_nvdec_common.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
class nvhost_nvdec final : public nvhost_nvdec_common {
|
||||
public:
|
||||
explicit nvhost_nvdec(Core::System& system_, NvCore::Container& core);
|
||||
~nvhost_nvdec() override;
|
||||
|
||||
NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) override;
|
||||
NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) override;
|
||||
NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) override;
|
||||
|
||||
void OnOpen(DeviceFD fd) override;
|
||||
void OnClose(DeviceFD fd) override;
|
||||
};
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
||||
@@ -1,188 +1,188 @@
|
||||
// SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include <algorithm>
|
||||
#include <cstring>
|
||||
|
||||
#include "common/assert.h"
|
||||
#include "common/common_types.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "core/core.h"
|
||||
#include "core/hle/service/nvdrv/core/container.h"
|
||||
#include "core/hle/service/nvdrv/core/nvmap.h"
|
||||
#include "core/hle/service/nvdrv/core/syncpoint_manager.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_nvdec_common.h"
|
||||
#include "core/memory.h"
|
||||
#include "video_core/host1x/host1x.h"
|
||||
#include "video_core/memory_manager.h"
|
||||
#include "video_core/renderer_base.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
namespace {
|
||||
// Copies count amount of type T from the input vector into the dst vector.
|
||||
// Returns the number of bytes written into dst.
|
||||
template <typename T>
|
||||
std::size_t SliceVectors(const std::vector<u8>& input, std::vector<T>& dst, std::size_t count,
|
||||
std::size_t offset) {
|
||||
if (dst.empty()) {
|
||||
return 0;
|
||||
}
|
||||
const size_t bytes_copied = count * sizeof(T);
|
||||
std::memcpy(dst.data(), input.data() + offset, bytes_copied);
|
||||
return bytes_copied;
|
||||
}
|
||||
|
||||
// Writes the data in src to an offset into the dst vector. The offset is specified in bytes
|
||||
// Returns the number of bytes written into dst.
|
||||
template <typename T>
|
||||
std::size_t WriteVectors(std::vector<u8>& dst, const std::vector<T>& src, std::size_t offset) {
|
||||
if (src.empty()) {
|
||||
return 0;
|
||||
}
|
||||
const size_t bytes_copied = src.size() * sizeof(T);
|
||||
std::memcpy(dst.data() + offset, src.data(), bytes_copied);
|
||||
return bytes_copied;
|
||||
}
|
||||
} // Anonymous namespace
|
||||
|
||||
nvhost_nvdec_common::nvhost_nvdec_common(Core::System& system_, NvCore::Container& core_,
|
||||
NvCore::ChannelType channel_type_)
|
||||
: nvdevice{system_}, core{core_}, syncpoint_manager{core.GetSyncpointManager()},
|
||||
nvmap{core.GetNvMapFile()}, channel_type{channel_type_} {
|
||||
auto& syncpts_accumulated = core.Host1xDeviceFile().syncpts_accumulated;
|
||||
if (syncpts_accumulated.empty()) {
|
||||
channel_syncpoint = syncpoint_manager.AllocateSyncpoint(false);
|
||||
} else {
|
||||
channel_syncpoint = syncpts_accumulated.front();
|
||||
syncpts_accumulated.pop_front();
|
||||
}
|
||||
}
|
||||
|
||||
nvhost_nvdec_common::~nvhost_nvdec_common() {
|
||||
core.Host1xDeviceFile().syncpts_accumulated.push_back(channel_syncpoint);
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec_common::SetNVMAPfd(const std::vector<u8>& input) {
|
||||
IoctlSetNvmapFD params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlSetNvmapFD));
|
||||
LOG_DEBUG(Service_NVDRV, "called, fd={}", params.nvmap_fd);
|
||||
|
||||
nvmap_fd = params.nvmap_fd;
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec_common::Submit(DeviceFD fd, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
IoctlSubmit params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlSubmit));
|
||||
LOG_DEBUG(Service_NVDRV, "called NVDEC Submit, cmd_buffer_count={}", params.cmd_buffer_count);
|
||||
|
||||
// Instantiate param buffers
|
||||
std::vector<CommandBuffer> command_buffers(params.cmd_buffer_count);
|
||||
std::vector<Reloc> relocs(params.relocation_count);
|
||||
std::vector<u32> reloc_shifts(params.relocation_count);
|
||||
std::vector<SyncptIncr> syncpt_increments(params.syncpoint_count);
|
||||
std::vector<u32> fence_thresholds(params.fence_count);
|
||||
|
||||
// Slice input into their respective buffers
|
||||
std::size_t offset = sizeof(IoctlSubmit);
|
||||
offset += SliceVectors(input, command_buffers, params.cmd_buffer_count, offset);
|
||||
offset += SliceVectors(input, relocs, params.relocation_count, offset);
|
||||
offset += SliceVectors(input, reloc_shifts, params.relocation_count, offset);
|
||||
offset += SliceVectors(input, syncpt_increments, params.syncpoint_count, offset);
|
||||
offset += SliceVectors(input, fence_thresholds, params.fence_count, offset);
|
||||
|
||||
auto& gpu = system.GPU();
|
||||
if (gpu.UseNvdec()) {
|
||||
for (std::size_t i = 0; i < syncpt_increments.size(); i++) {
|
||||
const SyncptIncr& syncpt_incr = syncpt_increments[i];
|
||||
fence_thresholds[i] =
|
||||
syncpoint_manager.IncrementSyncpointMaxExt(syncpt_incr.id, syncpt_incr.increments);
|
||||
}
|
||||
}
|
||||
for (const auto& cmd_buffer : command_buffers) {
|
||||
const auto object = nvmap.GetHandle(cmd_buffer.memory_id);
|
||||
ASSERT_OR_EXECUTE(object, return NvResult::InvalidState;);
|
||||
Tegra::ChCommandHeaderList cmdlist(cmd_buffer.word_count);
|
||||
system.Memory().ReadBlock(object->address + cmd_buffer.offset, cmdlist.data(),
|
||||
cmdlist.size() * sizeof(u32));
|
||||
gpu.PushCommandBuffer(core.Host1xDeviceFile().fd_to_id[fd], cmdlist);
|
||||
}
|
||||
std::memcpy(output.data(), ¶ms, sizeof(IoctlSubmit));
|
||||
// Some games expect command_buffers to be written back
|
||||
offset = sizeof(IoctlSubmit);
|
||||
offset += WriteVectors(output, command_buffers, offset);
|
||||
offset += WriteVectors(output, relocs, offset);
|
||||
offset += WriteVectors(output, reloc_shifts, offset);
|
||||
offset += WriteVectors(output, syncpt_increments, offset);
|
||||
offset += WriteVectors(output, fence_thresholds, offset);
|
||||
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec_common::GetSyncpoint(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlGetSyncpoint params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlGetSyncpoint));
|
||||
LOG_DEBUG(Service_NVDRV, "called GetSyncpoint, id={}", params.param);
|
||||
|
||||
// const u32 id{NvCore::SyncpointManager::channel_syncpoints[static_cast<u32>(channel_type)]};
|
||||
params.value = channel_syncpoint;
|
||||
std::memcpy(output.data(), ¶ms, sizeof(IoctlGetSyncpoint));
|
||||
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec_common::GetWaitbase(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlGetWaitbase params{};
|
||||
LOG_CRITICAL(Service_NVDRV, "called WAITBASE");
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlGetWaitbase));
|
||||
params.value = 0; // Seems to be hard coded at 0
|
||||
std::memcpy(output.data(), ¶ms, sizeof(IoctlGetWaitbase));
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec_common::MapBuffer(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlMapBuffer params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlMapBuffer));
|
||||
std::vector<MapBufferEntry> cmd_buffer_handles(params.num_entries);
|
||||
|
||||
SliceVectors(input, cmd_buffer_handles, params.num_entries, sizeof(IoctlMapBuffer));
|
||||
|
||||
for (auto& cmd_buffer : cmd_buffer_handles) {
|
||||
cmd_buffer.map_address = nvmap.PinHandle(cmd_buffer.map_handle);
|
||||
}
|
||||
std::memcpy(output.data(), ¶ms, sizeof(IoctlMapBuffer));
|
||||
std::memcpy(output.data() + sizeof(IoctlMapBuffer), cmd_buffer_handles.data(),
|
||||
cmd_buffer_handles.size() * sizeof(MapBufferEntry));
|
||||
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec_common::UnmapBuffer(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlMapBuffer params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlMapBuffer));
|
||||
std::vector<MapBufferEntry> cmd_buffer_handles(params.num_entries);
|
||||
|
||||
SliceVectors(input, cmd_buffer_handles, params.num_entries, sizeof(IoctlMapBuffer));
|
||||
for (auto& cmd_buffer : cmd_buffer_handles) {
|
||||
nvmap.UnpinHandle(cmd_buffer.map_handle);
|
||||
}
|
||||
|
||||
std::memset(output.data(), 0, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec_common::SetSubmitTimeout(const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
std::memcpy(&submit_timeout, input.data(), input.size());
|
||||
LOG_WARNING(Service_NVDRV, "(STUBBED) called");
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
Kernel::KEvent* nvhost_nvdec_common::QueryEvent(u32 event_id) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Unknown HOSTX1 Event {}", event_id);
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
// SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include <algorithm>
|
||||
#include <cstring>
|
||||
|
||||
#include "common/assert.h"
|
||||
#include "common/common_types.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "core/core.h"
|
||||
#include "core/hle/service/nvdrv/core/container.h"
|
||||
#include "core/hle/service/nvdrv/core/nvmap.h"
|
||||
#include "core/hle/service/nvdrv/core/syncpoint_manager.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_nvdec_common.h"
|
||||
#include "core/memory.h"
|
||||
#include "video_core/host1x/host1x.h"
|
||||
#include "video_core/memory_manager.h"
|
||||
#include "video_core/renderer_base.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
namespace {
|
||||
// Copies count amount of type T from the input vector into the dst vector.
|
||||
// Returns the number of bytes written into dst.
|
||||
template <typename T>
|
||||
std::size_t SliceVectors(const std::vector<u8>& input, std::vector<T>& dst, std::size_t count,
|
||||
std::size_t offset) {
|
||||
if (dst.empty()) {
|
||||
return 0;
|
||||
}
|
||||
const size_t bytes_copied = count * sizeof(T);
|
||||
std::memcpy(dst.data(), input.data() + offset, bytes_copied);
|
||||
return bytes_copied;
|
||||
}
|
||||
|
||||
// Writes the data in src to an offset into the dst vector. The offset is specified in bytes
|
||||
// Returns the number of bytes written into dst.
|
||||
template <typename T>
|
||||
std::size_t WriteVectors(std::vector<u8>& dst, const std::vector<T>& src, std::size_t offset) {
|
||||
if (src.empty()) {
|
||||
return 0;
|
||||
}
|
||||
const size_t bytes_copied = src.size() * sizeof(T);
|
||||
std::memcpy(dst.data() + offset, src.data(), bytes_copied);
|
||||
return bytes_copied;
|
||||
}
|
||||
} // Anonymous namespace
|
||||
|
||||
nvhost_nvdec_common::nvhost_nvdec_common(Core::System& system_, NvCore::Container& core_,
|
||||
NvCore::ChannelType channel_type_)
|
||||
: nvdevice{system_}, core{core_}, syncpoint_manager{core.GetSyncpointManager()},
|
||||
nvmap{core.GetNvMapFile()}, channel_type{channel_type_} {
|
||||
auto& syncpts_accumulated = core.Host1xDeviceFile().syncpts_accumulated;
|
||||
if (syncpts_accumulated.empty()) {
|
||||
channel_syncpoint = syncpoint_manager.AllocateSyncpoint(false);
|
||||
} else {
|
||||
channel_syncpoint = syncpts_accumulated.front();
|
||||
syncpts_accumulated.pop_front();
|
||||
}
|
||||
}
|
||||
|
||||
nvhost_nvdec_common::~nvhost_nvdec_common() {
|
||||
core.Host1xDeviceFile().syncpts_accumulated.push_back(channel_syncpoint);
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec_common::SetNVMAPfd(const std::vector<u8>& input) {
|
||||
IoctlSetNvmapFD params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlSetNvmapFD));
|
||||
LOG_DEBUG(Service_NVDRV, "called, fd={}", params.nvmap_fd);
|
||||
|
||||
nvmap_fd = params.nvmap_fd;
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec_common::Submit(DeviceFD fd, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
IoctlSubmit params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlSubmit));
|
||||
LOG_DEBUG(Service_NVDRV, "called NVDEC Submit, cmd_buffer_count={}", params.cmd_buffer_count);
|
||||
|
||||
// Instantiate param buffers
|
||||
std::vector<CommandBuffer> command_buffers(params.cmd_buffer_count);
|
||||
std::vector<Reloc> relocs(params.relocation_count);
|
||||
std::vector<u32> reloc_shifts(params.relocation_count);
|
||||
std::vector<SyncptIncr> syncpt_increments(params.syncpoint_count);
|
||||
std::vector<u32> fence_thresholds(params.fence_count);
|
||||
|
||||
// Slice input into their respective buffers
|
||||
std::size_t offset = sizeof(IoctlSubmit);
|
||||
offset += SliceVectors(input, command_buffers, params.cmd_buffer_count, offset);
|
||||
offset += SliceVectors(input, relocs, params.relocation_count, offset);
|
||||
offset += SliceVectors(input, reloc_shifts, params.relocation_count, offset);
|
||||
offset += SliceVectors(input, syncpt_increments, params.syncpoint_count, offset);
|
||||
offset += SliceVectors(input, fence_thresholds, params.fence_count, offset);
|
||||
|
||||
auto& gpu = system.GPU();
|
||||
if (gpu.UseNvdec()) {
|
||||
for (std::size_t i = 0; i < syncpt_increments.size(); i++) {
|
||||
const SyncptIncr& syncpt_incr = syncpt_increments[i];
|
||||
fence_thresholds[i] =
|
||||
syncpoint_manager.IncrementSyncpointMaxExt(syncpt_incr.id, syncpt_incr.increments);
|
||||
}
|
||||
}
|
||||
for (const auto& cmd_buffer : command_buffers) {
|
||||
const auto object = nvmap.GetHandle(cmd_buffer.memory_id);
|
||||
ASSERT_OR_EXECUTE(object, return NvResult::InvalidState;);
|
||||
Tegra::ChCommandHeaderList cmdlist(cmd_buffer.word_count);
|
||||
system.Memory().ReadBlock(object->address + cmd_buffer.offset, cmdlist.data(),
|
||||
cmdlist.size() * sizeof(u32));
|
||||
gpu.PushCommandBuffer(core.Host1xDeviceFile().fd_to_id[fd], cmdlist);
|
||||
}
|
||||
std::memcpy(output.data(), ¶ms, sizeof(IoctlSubmit));
|
||||
// Some games expect command_buffers to be written back
|
||||
offset = sizeof(IoctlSubmit);
|
||||
offset += WriteVectors(output, command_buffers, offset);
|
||||
offset += WriteVectors(output, relocs, offset);
|
||||
offset += WriteVectors(output, reloc_shifts, offset);
|
||||
offset += WriteVectors(output, syncpt_increments, offset);
|
||||
offset += WriteVectors(output, fence_thresholds, offset);
|
||||
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec_common::GetSyncpoint(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlGetSyncpoint params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlGetSyncpoint));
|
||||
LOG_DEBUG(Service_NVDRV, "called GetSyncpoint, id={}", params.param);
|
||||
|
||||
// const u32 id{NvCore::SyncpointManager::channel_syncpoints[static_cast<u32>(channel_type)]};
|
||||
params.value = channel_syncpoint;
|
||||
std::memcpy(output.data(), ¶ms, sizeof(IoctlGetSyncpoint));
|
||||
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec_common::GetWaitbase(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlGetWaitbase params{};
|
||||
LOG_CRITICAL(Service_NVDRV, "called WAITBASE");
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlGetWaitbase));
|
||||
params.value = 0; // Seems to be hard coded at 0
|
||||
std::memcpy(output.data(), ¶ms, sizeof(IoctlGetWaitbase));
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec_common::MapBuffer(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlMapBuffer params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlMapBuffer));
|
||||
std::vector<MapBufferEntry> cmd_buffer_handles(params.num_entries);
|
||||
|
||||
SliceVectors(input, cmd_buffer_handles, params.num_entries, sizeof(IoctlMapBuffer));
|
||||
|
||||
for (auto& cmd_buffer : cmd_buffer_handles) {
|
||||
cmd_buffer.map_address = nvmap.PinHandle(cmd_buffer.map_handle);
|
||||
}
|
||||
std::memcpy(output.data(), ¶ms, sizeof(IoctlMapBuffer));
|
||||
std::memcpy(output.data() + sizeof(IoctlMapBuffer), cmd_buffer_handles.data(),
|
||||
cmd_buffer_handles.size() * sizeof(MapBufferEntry));
|
||||
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec_common::UnmapBuffer(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlMapBuffer params{};
|
||||
std::memcpy(¶ms, input.data(), sizeof(IoctlMapBuffer));
|
||||
std::vector<MapBufferEntry> cmd_buffer_handles(params.num_entries);
|
||||
|
||||
SliceVectors(input, cmd_buffer_handles, params.num_entries, sizeof(IoctlMapBuffer));
|
||||
for (auto& cmd_buffer : cmd_buffer_handles) {
|
||||
nvmap.UnpinHandle(cmd_buffer.map_handle);
|
||||
}
|
||||
|
||||
std::memset(output.data(), 0, output.size());
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvdec_common::SetSubmitTimeout(const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
std::memcpy(&submit_timeout, input.data(), input.size());
|
||||
LOG_WARNING(Service_NVDRV, "(STUBBED) called");
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
Kernel::KEvent* nvhost_nvdec_common::QueryEvent(u32 event_id) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Unknown HOSTX1 Event {}", event_id);
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
||||
@@ -1,130 +1,130 @@
|
||||
// SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <deque>
|
||||
#include <vector>
|
||||
#include "common/common_types.h"
|
||||
#include "common/swap.h"
|
||||
#include "core/hle/service/nvdrv/core/syncpoint_manager.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvdevice.h"
|
||||
|
||||
namespace Service::Nvidia {
|
||||
|
||||
namespace NvCore {
|
||||
class Container;
|
||||
class NvMap;
|
||||
} // namespace NvCore
|
||||
|
||||
namespace Devices {
|
||||
|
||||
class nvhost_nvdec_common : public nvdevice {
|
||||
public:
|
||||
explicit nvhost_nvdec_common(Core::System& system_, NvCore::Container& core,
|
||||
NvCore::ChannelType channel_type);
|
||||
~nvhost_nvdec_common() override;
|
||||
|
||||
protected:
|
||||
struct IoctlSetNvmapFD {
|
||||
s32_le nvmap_fd{};
|
||||
};
|
||||
static_assert(sizeof(IoctlSetNvmapFD) == 4, "IoctlSetNvmapFD is incorrect size");
|
||||
|
||||
struct IoctlSubmitCommandBuffer {
|
||||
u32_le id{};
|
||||
u32_le offset{};
|
||||
u32_le count{};
|
||||
};
|
||||
static_assert(sizeof(IoctlSubmitCommandBuffer) == 0xC,
|
||||
"IoctlSubmitCommandBuffer is incorrect size");
|
||||
struct IoctlSubmit {
|
||||
u32_le cmd_buffer_count{};
|
||||
u32_le relocation_count{};
|
||||
u32_le syncpoint_count{};
|
||||
u32_le fence_count{};
|
||||
};
|
||||
static_assert(sizeof(IoctlSubmit) == 0x10, "IoctlSubmit has incorrect size");
|
||||
|
||||
struct CommandBuffer {
|
||||
s32 memory_id{};
|
||||
u32 offset{};
|
||||
s32 word_count{};
|
||||
};
|
||||
static_assert(sizeof(CommandBuffer) == 0xC, "CommandBuffer has incorrect size");
|
||||
|
||||
struct Reloc {
|
||||
s32 cmdbuffer_memory{};
|
||||
s32 cmdbuffer_offset{};
|
||||
s32 target{};
|
||||
s32 target_offset{};
|
||||
};
|
||||
static_assert(sizeof(Reloc) == 0x10, "Reloc has incorrect size");
|
||||
|
||||
struct SyncptIncr {
|
||||
u32 id{};
|
||||
u32 increments{};
|
||||
u32 unk0{};
|
||||
u32 unk1{};
|
||||
u32 unk2{};
|
||||
};
|
||||
static_assert(sizeof(SyncptIncr) == 0x14, "SyncptIncr has incorrect size");
|
||||
|
||||
struct IoctlGetSyncpoint {
|
||||
// Input
|
||||
u32_le param{};
|
||||
// Output
|
||||
u32_le value{};
|
||||
};
|
||||
static_assert(sizeof(IoctlGetSyncpoint) == 8, "IocGetIdParams has wrong size");
|
||||
|
||||
struct IoctlGetWaitbase {
|
||||
u32_le unknown{}; // seems to be ignored? Nintendo added this
|
||||
u32_le value{};
|
||||
};
|
||||
static_assert(sizeof(IoctlGetWaitbase) == 0x8, "IoctlGetWaitbase is incorrect size");
|
||||
|
||||
struct IoctlMapBuffer {
|
||||
u32_le num_entries{};
|
||||
u32_le data_address{}; // Ignored by the driver.
|
||||
u32_le attach_host_ch_das{};
|
||||
};
|
||||
static_assert(sizeof(IoctlMapBuffer) == 0x0C, "IoctlMapBuffer is incorrect size");
|
||||
|
||||
struct IocGetIdParams {
|
||||
// Input
|
||||
u32_le param{};
|
||||
// Output
|
||||
u32_le value{};
|
||||
};
|
||||
static_assert(sizeof(IocGetIdParams) == 8, "IocGetIdParams has wrong size");
|
||||
|
||||
// Used for mapping and unmapping command buffers
|
||||
struct MapBufferEntry {
|
||||
u32_le map_handle{};
|
||||
u32_le map_address{};
|
||||
};
|
||||
static_assert(sizeof(IoctlMapBuffer) == 0x0C, "IoctlMapBuffer is incorrect size");
|
||||
|
||||
/// Ioctl command implementations
|
||||
NvResult SetNVMAPfd(const std::vector<u8>& input);
|
||||
NvResult Submit(DeviceFD fd, const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult GetSyncpoint(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult GetWaitbase(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult MapBuffer(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult UnmapBuffer(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult SetSubmitTimeout(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
|
||||
Kernel::KEvent* QueryEvent(u32 event_id) override;
|
||||
|
||||
u32 channel_syncpoint;
|
||||
s32_le nvmap_fd{};
|
||||
u32_le submit_timeout{};
|
||||
NvCore::Container& core;
|
||||
NvCore::SyncpointManager& syncpoint_manager;
|
||||
NvCore::NvMap& nvmap;
|
||||
NvCore::ChannelType channel_type;
|
||||
std::array<u32, MaxSyncPoints> device_syncpoints{};
|
||||
};
|
||||
}; // namespace Devices
|
||||
} // namespace Service::Nvidia
|
||||
// SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <deque>
|
||||
#include <vector>
|
||||
#include "common/common_types.h"
|
||||
#include "common/swap.h"
|
||||
#include "core/hle/service/nvdrv/core/syncpoint_manager.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvdevice.h"
|
||||
|
||||
namespace Service::Nvidia {
|
||||
|
||||
namespace NvCore {
|
||||
class Container;
|
||||
class NvMap;
|
||||
} // namespace NvCore
|
||||
|
||||
namespace Devices {
|
||||
|
||||
class nvhost_nvdec_common : public nvdevice {
|
||||
public:
|
||||
explicit nvhost_nvdec_common(Core::System& system_, NvCore::Container& core,
|
||||
NvCore::ChannelType channel_type);
|
||||
~nvhost_nvdec_common() override;
|
||||
|
||||
protected:
|
||||
struct IoctlSetNvmapFD {
|
||||
s32_le nvmap_fd{};
|
||||
};
|
||||
static_assert(sizeof(IoctlSetNvmapFD) == 4, "IoctlSetNvmapFD is incorrect size");
|
||||
|
||||
struct IoctlSubmitCommandBuffer {
|
||||
u32_le id{};
|
||||
u32_le offset{};
|
||||
u32_le count{};
|
||||
};
|
||||
static_assert(sizeof(IoctlSubmitCommandBuffer) == 0xC,
|
||||
"IoctlSubmitCommandBuffer is incorrect size");
|
||||
struct IoctlSubmit {
|
||||
u32_le cmd_buffer_count{};
|
||||
u32_le relocation_count{};
|
||||
u32_le syncpoint_count{};
|
||||
u32_le fence_count{};
|
||||
};
|
||||
static_assert(sizeof(IoctlSubmit) == 0x10, "IoctlSubmit has incorrect size");
|
||||
|
||||
struct CommandBuffer {
|
||||
s32 memory_id{};
|
||||
u32 offset{};
|
||||
s32 word_count{};
|
||||
};
|
||||
static_assert(sizeof(CommandBuffer) == 0xC, "CommandBuffer has incorrect size");
|
||||
|
||||
struct Reloc {
|
||||
s32 cmdbuffer_memory{};
|
||||
s32 cmdbuffer_offset{};
|
||||
s32 target{};
|
||||
s32 target_offset{};
|
||||
};
|
||||
static_assert(sizeof(Reloc) == 0x10, "Reloc has incorrect size");
|
||||
|
||||
struct SyncptIncr {
|
||||
u32 id{};
|
||||
u32 increments{};
|
||||
u32 unk0{};
|
||||
u32 unk1{};
|
||||
u32 unk2{};
|
||||
};
|
||||
static_assert(sizeof(SyncptIncr) == 0x14, "SyncptIncr has incorrect size");
|
||||
|
||||
struct IoctlGetSyncpoint {
|
||||
// Input
|
||||
u32_le param{};
|
||||
// Output
|
||||
u32_le value{};
|
||||
};
|
||||
static_assert(sizeof(IoctlGetSyncpoint) == 8, "IocGetIdParams has wrong size");
|
||||
|
||||
struct IoctlGetWaitbase {
|
||||
u32_le unknown{}; // seems to be ignored? Nintendo added this
|
||||
u32_le value{};
|
||||
};
|
||||
static_assert(sizeof(IoctlGetWaitbase) == 0x8, "IoctlGetWaitbase is incorrect size");
|
||||
|
||||
struct IoctlMapBuffer {
|
||||
u32_le num_entries{};
|
||||
u32_le data_address{}; // Ignored by the driver.
|
||||
u32_le attach_host_ch_das{};
|
||||
};
|
||||
static_assert(sizeof(IoctlMapBuffer) == 0x0C, "IoctlMapBuffer is incorrect size");
|
||||
|
||||
struct IocGetIdParams {
|
||||
// Input
|
||||
u32_le param{};
|
||||
// Output
|
||||
u32_le value{};
|
||||
};
|
||||
static_assert(sizeof(IocGetIdParams) == 8, "IocGetIdParams has wrong size");
|
||||
|
||||
// Used for mapping and unmapping command buffers
|
||||
struct MapBufferEntry {
|
||||
u32_le map_handle{};
|
||||
u32_le map_address{};
|
||||
};
|
||||
static_assert(sizeof(IoctlMapBuffer) == 0x0C, "IoctlMapBuffer is incorrect size");
|
||||
|
||||
/// Ioctl command implementations
|
||||
NvResult SetNVMAPfd(const std::vector<u8>& input);
|
||||
NvResult Submit(DeviceFD fd, const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult GetSyncpoint(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult GetWaitbase(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult MapBuffer(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult UnmapBuffer(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult SetSubmitTimeout(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
|
||||
Kernel::KEvent* QueryEvent(u32 event_id) override;
|
||||
|
||||
u32 channel_syncpoint;
|
||||
s32_le nvmap_fd{};
|
||||
u32_le submit_timeout{};
|
||||
NvCore::Container& core;
|
||||
NvCore::SyncpointManager& syncpoint_manager;
|
||||
NvCore::NvMap& nvmap;
|
||||
NvCore::ChannelType channel_type;
|
||||
std::array<u32, MaxSyncPoints> device_syncpoints{};
|
||||
};
|
||||
}; // namespace Devices
|
||||
} // namespace Service::Nvidia
|
||||
|
||||
@@ -1,58 +1,58 @@
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include <cstring>
|
||||
|
||||
#include "common/assert.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_nvjpg.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
nvhost_nvjpg::nvhost_nvjpg(Core::System& system_) : nvdevice{system_} {}
|
||||
nvhost_nvjpg::~nvhost_nvjpg() = default;
|
||||
|
||||
NvResult nvhost_nvjpg::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
switch (command.group) {
|
||||
case 'H':
|
||||
switch (command.cmd) {
|
||||
case 0x1:
|
||||
return SetNVMAPfd(input, output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvjpg::Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvjpg::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
void nvhost_nvjpg::OnOpen(DeviceFD fd) {}
|
||||
void nvhost_nvjpg::OnClose(DeviceFD fd) {}
|
||||
|
||||
NvResult nvhost_nvjpg::SetNVMAPfd(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlSetNvmapFD params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
LOG_DEBUG(Service_NVDRV, "called, fd={}", params.nvmap_fd);
|
||||
|
||||
nvmap_fd = params.nvmap_fd;
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include <cstring>
|
||||
|
||||
#include "common/assert.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_nvjpg.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
nvhost_nvjpg::nvhost_nvjpg(Core::System& system_) : nvdevice{system_} {}
|
||||
nvhost_nvjpg::~nvhost_nvjpg() = default;
|
||||
|
||||
NvResult nvhost_nvjpg::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
switch (command.group) {
|
||||
case 'H':
|
||||
switch (command.cmd) {
|
||||
case 0x1:
|
||||
return SetNVMAPfd(input, output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvjpg::Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_nvjpg::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
void nvhost_nvjpg::OnOpen(DeviceFD fd) {}
|
||||
void nvhost_nvjpg::OnClose(DeviceFD fd) {}
|
||||
|
||||
NvResult nvhost_nvjpg::SetNVMAPfd(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IoctlSetNvmapFD params{};
|
||||
std::memcpy(¶ms, input.data(), input.size());
|
||||
LOG_DEBUG(Service_NVDRV, "called, fd={}", params.nvmap_fd);
|
||||
|
||||
nvmap_fd = params.nvmap_fd;
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
||||
@@ -1,39 +1,39 @@
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <vector>
|
||||
#include "common/common_types.h"
|
||||
#include "common/swap.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvdevice.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
class nvhost_nvjpg final : public nvdevice {
|
||||
public:
|
||||
explicit nvhost_nvjpg(Core::System& system_);
|
||||
~nvhost_nvjpg() override;
|
||||
|
||||
NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) override;
|
||||
NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) override;
|
||||
NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) override;
|
||||
|
||||
void OnOpen(DeviceFD fd) override;
|
||||
void OnClose(DeviceFD fd) override;
|
||||
|
||||
private:
|
||||
struct IoctlSetNvmapFD {
|
||||
s32_le nvmap_fd{};
|
||||
};
|
||||
static_assert(sizeof(IoctlSetNvmapFD) == 4, "IoctlSetNvmapFD is incorrect size");
|
||||
|
||||
s32_le nvmap_fd{};
|
||||
|
||||
NvResult SetNVMAPfd(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
};
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <vector>
|
||||
#include "common/common_types.h"
|
||||
#include "common/swap.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvdevice.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
class nvhost_nvjpg final : public nvdevice {
|
||||
public:
|
||||
explicit nvhost_nvjpg(Core::System& system_);
|
||||
~nvhost_nvjpg() override;
|
||||
|
||||
NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) override;
|
||||
NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) override;
|
||||
NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) override;
|
||||
|
||||
void OnOpen(DeviceFD fd) override;
|
||||
void OnClose(DeviceFD fd) override;
|
||||
|
||||
private:
|
||||
struct IoctlSetNvmapFD {
|
||||
s32_le nvmap_fd{};
|
||||
};
|
||||
static_assert(sizeof(IoctlSetNvmapFD) == 4, "IoctlSetNvmapFD is incorrect size");
|
||||
|
||||
s32_le nvmap_fd{};
|
||||
|
||||
NvResult SetNVMAPfd(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
};
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
||||
@@ -1,80 +1,80 @@
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include "common/assert.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "core/core.h"
|
||||
#include "core/hle/service/nvdrv/core/container.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_vic.h"
|
||||
#include "video_core/renderer_base.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
nvhost_vic::nvhost_vic(Core::System& system_, NvCore::Container& core_)
|
||||
: nvhost_nvdec_common{system_, core_, NvCore::ChannelType::VIC} {}
|
||||
|
||||
nvhost_vic::~nvhost_vic() = default;
|
||||
|
||||
NvResult nvhost_vic::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
switch (command.group) {
|
||||
case 0x0:
|
||||
switch (command.cmd) {
|
||||
case 0x1: {
|
||||
auto& host1x_file = core.Host1xDeviceFile();
|
||||
if (!host1x_file.fd_to_id.contains(fd)) {
|
||||
host1x_file.fd_to_id[fd] = host1x_file.vic_next_id++;
|
||||
}
|
||||
return Submit(fd, input, output);
|
||||
}
|
||||
case 0x2:
|
||||
return GetSyncpoint(input, output);
|
||||
case 0x3:
|
||||
return GetWaitbase(input, output);
|
||||
case 0x9:
|
||||
return MapBuffer(input, output);
|
||||
case 0xa:
|
||||
return UnmapBuffer(input, output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 'H':
|
||||
switch (command.cmd) {
|
||||
case 0x1:
|
||||
return SetNVMAPfd(input);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_vic::Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_vic::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
void nvhost_vic::OnOpen(DeviceFD fd) {}
|
||||
|
||||
void nvhost_vic::OnClose(DeviceFD fd) {
|
||||
auto& host1x_file = core.Host1xDeviceFile();
|
||||
const auto iter = host1x_file.fd_to_id.find(fd);
|
||||
if (iter != host1x_file.fd_to_id.end()) {
|
||||
system.GPU().ClearCdmaInstance(iter->second);
|
||||
}
|
||||
}
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include "common/assert.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "core/core.h"
|
||||
#include "core/hle/service/nvdrv/core/container.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_vic.h"
|
||||
#include "video_core/renderer_base.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
nvhost_vic::nvhost_vic(Core::System& system_, NvCore::Container& core_)
|
||||
: nvhost_nvdec_common{system_, core_, NvCore::ChannelType::VIC} {}
|
||||
|
||||
nvhost_vic::~nvhost_vic() = default;
|
||||
|
||||
NvResult nvhost_vic::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
switch (command.group) {
|
||||
case 0x0:
|
||||
switch (command.cmd) {
|
||||
case 0x1: {
|
||||
auto& host1x_file = core.Host1xDeviceFile();
|
||||
if (!host1x_file.fd_to_id.contains(fd)) {
|
||||
host1x_file.fd_to_id[fd] = host1x_file.vic_next_id++;
|
||||
}
|
||||
return Submit(fd, input, output);
|
||||
}
|
||||
case 0x2:
|
||||
return GetSyncpoint(input, output);
|
||||
case 0x3:
|
||||
return GetWaitbase(input, output);
|
||||
case 0x9:
|
||||
return MapBuffer(input, output);
|
||||
case 0xa:
|
||||
return UnmapBuffer(input, output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case 'H':
|
||||
switch (command.cmd) {
|
||||
case 0x1:
|
||||
return SetNVMAPfd(input);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_vic::Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvhost_vic::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
void nvhost_vic::OnOpen(DeviceFD fd) {}
|
||||
|
||||
void nvhost_vic::OnClose(DeviceFD fd) {
|
||||
auto& host1x_file = core.Host1xDeviceFile();
|
||||
const auto iter = host1x_file.fd_to_id.find(fd);
|
||||
if (iter != host1x_file.fd_to_id.end()) {
|
||||
system.GPU().ClearCdmaInstance(iter->second);
|
||||
}
|
||||
}
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
||||
@@ -1,25 +1,25 @@
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_nvdec_common.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
class nvhost_vic final : public nvhost_nvdec_common {
|
||||
public:
|
||||
explicit nvhost_vic(Core::System& system_, NvCore::Container& core);
|
||||
~nvhost_vic();
|
||||
|
||||
NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) override;
|
||||
NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) override;
|
||||
NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) override;
|
||||
|
||||
void OnOpen(DeviceFD fd) override;
|
||||
void OnClose(DeviceFD fd) override;
|
||||
};
|
||||
} // namespace Service::Nvidia::Devices
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "core/hle/service/nvdrv/devices/nvhost_nvdec_common.h"
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
class nvhost_vic final : public nvhost_nvdec_common {
|
||||
public:
|
||||
explicit nvhost_vic(Core::System& system_, NvCore::Container& core);
|
||||
~nvhost_vic();
|
||||
|
||||
NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) override;
|
||||
NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) override;
|
||||
NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) override;
|
||||
|
||||
void OnOpen(DeviceFD fd) override;
|
||||
void OnClose(DeviceFD fd) override;
|
||||
};
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
||||
@@ -1,272 +1,272 @@
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include <algorithm>
|
||||
#include <bit>
|
||||
#include <cstring>
|
||||
|
||||
#include "common/alignment.h"
|
||||
#include "common/assert.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "core/core.h"
|
||||
#include "core/hle/kernel/k_page_table.h"
|
||||
#include "core/hle/kernel/k_process.h"
|
||||
#include "core/hle/service/nvdrv/core/container.h"
|
||||
#include "core/hle/service/nvdrv/core/nvmap.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvmap.h"
|
||||
#include "core/memory.h"
|
||||
|
||||
using Core::Memory::YUZU_PAGESIZE;
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
nvmap::nvmap(Core::System& system_, NvCore::Container& container_)
|
||||
: nvdevice{system_}, container{container_}, file{container.GetNvMapFile()} {}
|
||||
|
||||
nvmap::~nvmap() = default;
|
||||
|
||||
NvResult nvmap::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
switch (command.group) {
|
||||
case 0x1:
|
||||
switch (command.cmd) {
|
||||
case 0x1:
|
||||
return IocCreate(input, output);
|
||||
case 0x3:
|
||||
return IocFromId(input, output);
|
||||
case 0x4:
|
||||
return IocAlloc(input, output);
|
||||
case 0x5:
|
||||
return IocFree(input, output);
|
||||
case 0x9:
|
||||
return IocParam(input, output);
|
||||
case 0xe:
|
||||
return IocGetId(input, output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvmap::Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvmap::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
void nvmap::OnOpen(DeviceFD fd) {}
|
||||
void nvmap::OnClose(DeviceFD fd) {}
|
||||
|
||||
NvResult nvmap::IocCreate(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IocCreateParams params;
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
LOG_DEBUG(Service_NVDRV, "called, size=0x{:08X}", params.size);
|
||||
|
||||
std::shared_ptr<NvCore::NvMap::Handle> handle_description{};
|
||||
auto result =
|
||||
file.CreateHandle(Common::AlignUp(params.size, YUZU_PAGESIZE), handle_description);
|
||||
if (result != NvResult::Success) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Failed to create Object");
|
||||
return result;
|
||||
}
|
||||
handle_description->orig_size = params.size; // Orig size is the unaligned size
|
||||
params.handle = handle_description->id;
|
||||
LOG_DEBUG(Service_NVDRV, "handle: {}, size: 0x{:X}", handle_description->id, params.size);
|
||||
|
||||
std::memcpy(output.data(), ¶ms, sizeof(params));
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvmap::IocAlloc(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IocAllocParams params;
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
LOG_DEBUG(Service_NVDRV, "called, addr={:X}", params.address);
|
||||
|
||||
if (!params.handle) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Handle is 0");
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
if ((params.align - 1) & params.align) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Incorrect alignment used, alignment={:08X}", params.align);
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
// Force page size alignment at a minimum
|
||||
if (params.align < YUZU_PAGESIZE) {
|
||||
params.align = YUZU_PAGESIZE;
|
||||
}
|
||||
|
||||
auto handle_description{file.GetHandle(params.handle)};
|
||||
if (!handle_description) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Object does not exist, handle={:08X}", params.handle);
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
if (handle_description->allocated) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Object is already allocated, handle={:08X}", params.handle);
|
||||
return NvResult::InsufficientMemory;
|
||||
}
|
||||
|
||||
const auto result =
|
||||
handle_description->Alloc(params.flags, params.align, params.kind, params.address);
|
||||
if (result != NvResult::Success) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Object failed to allocate, handle={:08X}", params.handle);
|
||||
return result;
|
||||
}
|
||||
ASSERT(system.CurrentProcess()
|
||||
->PageTable()
|
||||
.LockForMapDeviceAddressSpace(handle_description->address, handle_description->size,
|
||||
Kernel::KMemoryPermission::None, true)
|
||||
.IsSuccess());
|
||||
std::memcpy(output.data(), ¶ms, sizeof(params));
|
||||
return result;
|
||||
}
|
||||
|
||||
NvResult nvmap::IocGetId(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IocGetIdParams params;
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
|
||||
// See the comment in FromId for extra info on this function
|
||||
if (!params.handle) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Error!");
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
auto handle_description{file.GetHandle(params.handle)};
|
||||
if (!handle_description) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Error!");
|
||||
return NvResult::AccessDenied; // This will always return EPERM irrespective of if the
|
||||
// handle exists or not
|
||||
}
|
||||
|
||||
params.id = handle_description->id;
|
||||
std::memcpy(output.data(), ¶ms, sizeof(params));
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvmap::IocFromId(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IocFromIdParams params;
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
|
||||
LOG_DEBUG(Service_NVDRV, "called, id:{}", params.id);
|
||||
|
||||
// Handles and IDs are always the same value in nvmap however IDs can be used globally given the
|
||||
// right permissions.
|
||||
// Since we don't plan on ever supporting multiprocess we can skip implementing handle refs and
|
||||
// so this function just does simple validation and passes through the handle id.
|
||||
if (!params.id) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Zero Id is invalid!");
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
auto handle_description{file.GetHandle(params.id)};
|
||||
if (!handle_description) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Unregistered handle!");
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
auto result = handle_description->Duplicate(false);
|
||||
if (result != NvResult::Success) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Could not duplicate handle!");
|
||||
return result;
|
||||
}
|
||||
params.handle = handle_description->id;
|
||||
std::memcpy(output.data(), ¶ms, sizeof(params));
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvmap::IocParam(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
enum class ParamTypes { Size = 1, Alignment = 2, Base = 3, Heap = 4, Kind = 5, Compr = 6 };
|
||||
|
||||
IocParamParams params;
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
|
||||
LOG_DEBUG(Service_NVDRV, "called type={}", params.param);
|
||||
|
||||
if (!params.handle) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Invalid handle!");
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
auto handle_description{file.GetHandle(params.handle)};
|
||||
if (!handle_description) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Not registered handle!");
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
switch (params.param) {
|
||||
case HandleParameterType::Size:
|
||||
params.result = static_cast<u32_le>(handle_description->orig_size);
|
||||
break;
|
||||
case HandleParameterType::Alignment:
|
||||
params.result = static_cast<u32_le>(handle_description->align);
|
||||
break;
|
||||
case HandleParameterType::Base:
|
||||
params.result = static_cast<u32_le>(-22); // posix EINVAL
|
||||
break;
|
||||
case HandleParameterType::Heap:
|
||||
if (handle_description->allocated)
|
||||
params.result = 0x40000000;
|
||||
else
|
||||
params.result = 0;
|
||||
break;
|
||||
case HandleParameterType::Kind:
|
||||
params.result = handle_description->kind;
|
||||
break;
|
||||
case HandleParameterType::IsSharedMemMapped:
|
||||
params.result = handle_description->is_shared_mem_mapped;
|
||||
break;
|
||||
default:
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
std::memcpy(output.data(), ¶ms, sizeof(params));
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvmap::IocFree(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IocFreeParams params;
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
|
||||
if (!params.handle) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Handle null freed?");
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
if (auto freeInfo{file.FreeHandle(params.handle, false)}) {
|
||||
if (freeInfo->can_unlock) {
|
||||
ASSERT(system.CurrentProcess()
|
||||
->PageTable()
|
||||
.UnlockForDeviceAddressSpace(freeInfo->address, freeInfo->size)
|
||||
.IsSuccess());
|
||||
}
|
||||
params.address = freeInfo->address;
|
||||
params.size = static_cast<u32>(freeInfo->size);
|
||||
params.flags.raw = 0;
|
||||
params.flags.map_uncached.Assign(freeInfo->was_uncached);
|
||||
} else {
|
||||
// This is possible when there's internel dups or other duplicates.
|
||||
}
|
||||
|
||||
std::memcpy(output.data(), ¶ms, sizeof(params));
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#include <algorithm>
|
||||
#include <bit>
|
||||
#include <cstring>
|
||||
|
||||
#include "common/alignment.h"
|
||||
#include "common/assert.h"
|
||||
#include "common/logging/log.h"
|
||||
#include "core/core.h"
|
||||
#include "core/hle/kernel/k_page_table.h"
|
||||
#include "core/hle/kernel/k_process.h"
|
||||
#include "core/hle/service/nvdrv/core/container.h"
|
||||
#include "core/hle/service/nvdrv/core/nvmap.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvmap.h"
|
||||
#include "core/memory.h"
|
||||
|
||||
using Core::Memory::YUZU_PAGESIZE;
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
nvmap::nvmap(Core::System& system_, NvCore::Container& container_)
|
||||
: nvdevice{system_}, container{container_}, file{container.GetNvMapFile()} {}
|
||||
|
||||
nvmap::~nvmap() = default;
|
||||
|
||||
NvResult nvmap::Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) {
|
||||
switch (command.group) {
|
||||
case 0x1:
|
||||
switch (command.cmd) {
|
||||
case 0x1:
|
||||
return IocCreate(input, output);
|
||||
case 0x3:
|
||||
return IocFromId(input, output);
|
||||
case 0x4:
|
||||
return IocAlloc(input, output);
|
||||
case 0x5:
|
||||
return IocFree(input, output);
|
||||
case 0x9:
|
||||
return IocParam(input, output);
|
||||
case 0xe:
|
||||
return IocGetId(input, output);
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvmap::Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
NvResult nvmap::Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) {
|
||||
UNIMPLEMENTED_MSG("Unimplemented ioctl={:08X}", command.raw);
|
||||
return NvResult::NotImplemented;
|
||||
}
|
||||
|
||||
void nvmap::OnOpen(DeviceFD fd) {}
|
||||
void nvmap::OnClose(DeviceFD fd) {}
|
||||
|
||||
NvResult nvmap::IocCreate(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IocCreateParams params;
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
LOG_DEBUG(Service_NVDRV, "called, size=0x{:08X}", params.size);
|
||||
|
||||
std::shared_ptr<NvCore::NvMap::Handle> handle_description{};
|
||||
auto result =
|
||||
file.CreateHandle(Common::AlignUp(params.size, YUZU_PAGESIZE), handle_description);
|
||||
if (result != NvResult::Success) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Failed to create Object");
|
||||
return result;
|
||||
}
|
||||
handle_description->orig_size = params.size; // Orig size is the unaligned size
|
||||
params.handle = handle_description->id;
|
||||
LOG_DEBUG(Service_NVDRV, "handle: {}, size: 0x{:X}", handle_description->id, params.size);
|
||||
|
||||
std::memcpy(output.data(), ¶ms, sizeof(params));
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvmap::IocAlloc(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IocAllocParams params;
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
LOG_DEBUG(Service_NVDRV, "called, addr={:X}", params.address);
|
||||
|
||||
if (!params.handle) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Handle is 0");
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
if ((params.align - 1) & params.align) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Incorrect alignment used, alignment={:08X}", params.align);
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
// Force page size alignment at a minimum
|
||||
if (params.align < YUZU_PAGESIZE) {
|
||||
params.align = YUZU_PAGESIZE;
|
||||
}
|
||||
|
||||
auto handle_description{file.GetHandle(params.handle)};
|
||||
if (!handle_description) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Object does not exist, handle={:08X}", params.handle);
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
if (handle_description->allocated) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Object is already allocated, handle={:08X}", params.handle);
|
||||
return NvResult::InsufficientMemory;
|
||||
}
|
||||
|
||||
const auto result =
|
||||
handle_description->Alloc(params.flags, params.align, params.kind, params.address);
|
||||
if (result != NvResult::Success) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Object failed to allocate, handle={:08X}", params.handle);
|
||||
return result;
|
||||
}
|
||||
ASSERT(system.CurrentProcess()
|
||||
->PageTable()
|
||||
.LockForMapDeviceAddressSpace(handle_description->address, handle_description->size,
|
||||
Kernel::KMemoryPermission::None, true)
|
||||
.IsSuccess());
|
||||
std::memcpy(output.data(), ¶ms, sizeof(params));
|
||||
return result;
|
||||
}
|
||||
|
||||
NvResult nvmap::IocGetId(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IocGetIdParams params;
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
|
||||
// See the comment in FromId for extra info on this function
|
||||
if (!params.handle) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Error!");
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
auto handle_description{file.GetHandle(params.handle)};
|
||||
if (!handle_description) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Error!");
|
||||
return NvResult::AccessDenied; // This will always return EPERM irrespective of if the
|
||||
// handle exists or not
|
||||
}
|
||||
|
||||
params.id = handle_description->id;
|
||||
std::memcpy(output.data(), ¶ms, sizeof(params));
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvmap::IocFromId(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IocFromIdParams params;
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
|
||||
LOG_DEBUG(Service_NVDRV, "called, id:{}", params.id);
|
||||
|
||||
// Handles and IDs are always the same value in nvmap however IDs can be used globally given the
|
||||
// right permissions.
|
||||
// Since we don't plan on ever supporting multiprocess we can skip implementing handle refs and
|
||||
// so this function just does simple validation and passes through the handle id.
|
||||
if (!params.id) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Zero Id is invalid!");
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
auto handle_description{file.GetHandle(params.id)};
|
||||
if (!handle_description) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Unregistered handle!");
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
auto result = handle_description->Duplicate(false);
|
||||
if (result != NvResult::Success) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Could not duplicate handle!");
|
||||
return result;
|
||||
}
|
||||
params.handle = handle_description->id;
|
||||
std::memcpy(output.data(), ¶ms, sizeof(params));
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvmap::IocParam(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
enum class ParamTypes { Size = 1, Alignment = 2, Base = 3, Heap = 4, Kind = 5, Compr = 6 };
|
||||
|
||||
IocParamParams params;
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
|
||||
LOG_DEBUG(Service_NVDRV, "called type={}", params.param);
|
||||
|
||||
if (!params.handle) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Invalid handle!");
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
auto handle_description{file.GetHandle(params.handle)};
|
||||
if (!handle_description) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Not registered handle!");
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
switch (params.param) {
|
||||
case HandleParameterType::Size:
|
||||
params.result = static_cast<u32_le>(handle_description->orig_size);
|
||||
break;
|
||||
case HandleParameterType::Alignment:
|
||||
params.result = static_cast<u32_le>(handle_description->align);
|
||||
break;
|
||||
case HandleParameterType::Base:
|
||||
params.result = static_cast<u32_le>(-22); // posix EINVAL
|
||||
break;
|
||||
case HandleParameterType::Heap:
|
||||
if (handle_description->allocated)
|
||||
params.result = 0x40000000;
|
||||
else
|
||||
params.result = 0;
|
||||
break;
|
||||
case HandleParameterType::Kind:
|
||||
params.result = handle_description->kind;
|
||||
break;
|
||||
case HandleParameterType::IsSharedMemMapped:
|
||||
params.result = handle_description->is_shared_mem_mapped;
|
||||
break;
|
||||
default:
|
||||
return NvResult::BadValue;
|
||||
}
|
||||
|
||||
std::memcpy(output.data(), ¶ms, sizeof(params));
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
NvResult nvmap::IocFree(const std::vector<u8>& input, std::vector<u8>& output) {
|
||||
IocFreeParams params;
|
||||
std::memcpy(¶ms, input.data(), sizeof(params));
|
||||
|
||||
LOG_DEBUG(Service_NVDRV, "called");
|
||||
|
||||
if (!params.handle) {
|
||||
LOG_CRITICAL(Service_NVDRV, "Handle null freed?");
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
if (auto freeInfo{file.FreeHandle(params.handle, false)}) {
|
||||
if (freeInfo->can_unlock) {
|
||||
ASSERT(system.CurrentProcess()
|
||||
->PageTable()
|
||||
.UnlockForDeviceAddressSpace(freeInfo->address, freeInfo->size)
|
||||
.IsSuccess());
|
||||
}
|
||||
params.address = freeInfo->address;
|
||||
params.size = static_cast<u32>(freeInfo->size);
|
||||
params.flags.raw = 0;
|
||||
params.flags.map_uncached.Assign(freeInfo->was_uncached);
|
||||
} else {
|
||||
// This is possible when there's internel dups or other duplicates.
|
||||
}
|
||||
|
||||
std::memcpy(output.data(), ¶ms, sizeof(params));
|
||||
return NvResult::Success;
|
||||
}
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
||||
@@ -1,120 +1,120 @@
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <memory>
|
||||
#include <unordered_map>
|
||||
#include <vector>
|
||||
#include "common/common_funcs.h"
|
||||
#include "common/common_types.h"
|
||||
#include "common/swap.h"
|
||||
#include "core/hle/service/nvdrv/core/nvmap.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvdevice.h"
|
||||
|
||||
namespace Service::Nvidia::NvCore {
|
||||
class Container;
|
||||
} // namespace Service::Nvidia::NvCore
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
class nvmap final : public nvdevice {
|
||||
public:
|
||||
explicit nvmap(Core::System& system_, NvCore::Container& container);
|
||||
~nvmap() override;
|
||||
|
||||
nvmap(const nvmap&) = delete;
|
||||
nvmap& operator=(const nvmap&) = delete;
|
||||
|
||||
NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) override;
|
||||
NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) override;
|
||||
NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) override;
|
||||
|
||||
void OnOpen(DeviceFD fd) override;
|
||||
void OnClose(DeviceFD fd) override;
|
||||
|
||||
enum class HandleParameterType : u32_le {
|
||||
Size = 1,
|
||||
Alignment = 2,
|
||||
Base = 3,
|
||||
Heap = 4,
|
||||
Kind = 5,
|
||||
IsSharedMemMapped = 6
|
||||
};
|
||||
|
||||
private:
|
||||
/// Id to use for the next handle that is created.
|
||||
u32 next_handle = 0;
|
||||
|
||||
/// Id to use for the next object that is created.
|
||||
u32 next_id = 0;
|
||||
|
||||
struct IocCreateParams {
|
||||
// Input
|
||||
u32_le size{};
|
||||
// Output
|
||||
u32_le handle{};
|
||||
};
|
||||
static_assert(sizeof(IocCreateParams) == 8, "IocCreateParams has wrong size");
|
||||
|
||||
struct IocFromIdParams {
|
||||
// Input
|
||||
u32_le id{};
|
||||
// Output
|
||||
u32_le handle{};
|
||||
};
|
||||
static_assert(sizeof(IocFromIdParams) == 8, "IocFromIdParams has wrong size");
|
||||
|
||||
struct IocAllocParams {
|
||||
// Input
|
||||
u32_le handle{};
|
||||
u32_le heap_mask{};
|
||||
NvCore::NvMap::Handle::Flags flags{};
|
||||
u32_le align{};
|
||||
u8 kind{};
|
||||
INSERT_PADDING_BYTES(7);
|
||||
u64_le address{};
|
||||
};
|
||||
static_assert(sizeof(IocAllocParams) == 32, "IocAllocParams has wrong size");
|
||||
|
||||
struct IocFreeParams {
|
||||
u32_le handle{};
|
||||
INSERT_PADDING_BYTES(4);
|
||||
u64_le address{};
|
||||
u32_le size{};
|
||||
NvCore::NvMap::Handle::Flags flags{};
|
||||
};
|
||||
static_assert(sizeof(IocFreeParams) == 24, "IocFreeParams has wrong size");
|
||||
|
||||
struct IocParamParams {
|
||||
// Input
|
||||
u32_le handle{};
|
||||
HandleParameterType param{};
|
||||
// Output
|
||||
u32_le result{};
|
||||
};
|
||||
static_assert(sizeof(IocParamParams) == 12, "IocParamParams has wrong size");
|
||||
|
||||
struct IocGetIdParams {
|
||||
// Output
|
||||
u32_le id{};
|
||||
// Input
|
||||
u32_le handle{};
|
||||
};
|
||||
static_assert(sizeof(IocGetIdParams) == 8, "IocGetIdParams has wrong size");
|
||||
|
||||
NvResult IocCreate(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocAlloc(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocGetId(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocFromId(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocParam(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocFree(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
|
||||
NvCore::Container& container;
|
||||
NvCore::NvMap& file;
|
||||
};
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <memory>
|
||||
#include <unordered_map>
|
||||
#include <vector>
|
||||
#include "common/common_funcs.h"
|
||||
#include "common/common_types.h"
|
||||
#include "common/swap.h"
|
||||
#include "core/hle/service/nvdrv/core/nvmap.h"
|
||||
#include "core/hle/service/nvdrv/devices/nvdevice.h"
|
||||
|
||||
namespace Service::Nvidia::NvCore {
|
||||
class Container;
|
||||
} // namespace Service::Nvidia::NvCore
|
||||
|
||||
namespace Service::Nvidia::Devices {
|
||||
|
||||
class nvmap final : public nvdevice {
|
||||
public:
|
||||
explicit nvmap(Core::System& system_, NvCore::Container& container);
|
||||
~nvmap() override;
|
||||
|
||||
nvmap(const nvmap&) = delete;
|
||||
nvmap& operator=(const nvmap&) = delete;
|
||||
|
||||
NvResult Ioctl1(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output) override;
|
||||
NvResult Ioctl2(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
const std::vector<u8>& inline_input, std::vector<u8>& output) override;
|
||||
NvResult Ioctl3(DeviceFD fd, Ioctl command, const std::vector<u8>& input,
|
||||
std::vector<u8>& output, std::vector<u8>& inline_output) override;
|
||||
|
||||
void OnOpen(DeviceFD fd) override;
|
||||
void OnClose(DeviceFD fd) override;
|
||||
|
||||
enum class HandleParameterType : u32_le {
|
||||
Size = 1,
|
||||
Alignment = 2,
|
||||
Base = 3,
|
||||
Heap = 4,
|
||||
Kind = 5,
|
||||
IsSharedMemMapped = 6
|
||||
};
|
||||
|
||||
private:
|
||||
/// Id to use for the next handle that is created.
|
||||
u32 next_handle = 0;
|
||||
|
||||
/// Id to use for the next object that is created.
|
||||
u32 next_id = 0;
|
||||
|
||||
struct IocCreateParams {
|
||||
// Input
|
||||
u32_le size{};
|
||||
// Output
|
||||
u32_le handle{};
|
||||
};
|
||||
static_assert(sizeof(IocCreateParams) == 8, "IocCreateParams has wrong size");
|
||||
|
||||
struct IocFromIdParams {
|
||||
// Input
|
||||
u32_le id{};
|
||||
// Output
|
||||
u32_le handle{};
|
||||
};
|
||||
static_assert(sizeof(IocFromIdParams) == 8, "IocFromIdParams has wrong size");
|
||||
|
||||
struct IocAllocParams {
|
||||
// Input
|
||||
u32_le handle{};
|
||||
u32_le heap_mask{};
|
||||
NvCore::NvMap::Handle::Flags flags{};
|
||||
u32_le align{};
|
||||
u8 kind{};
|
||||
INSERT_PADDING_BYTES(7);
|
||||
u64_le address{};
|
||||
};
|
||||
static_assert(sizeof(IocAllocParams) == 32, "IocAllocParams has wrong size");
|
||||
|
||||
struct IocFreeParams {
|
||||
u32_le handle{};
|
||||
INSERT_PADDING_BYTES(4);
|
||||
u64_le address{};
|
||||
u32_le size{};
|
||||
NvCore::NvMap::Handle::Flags flags{};
|
||||
};
|
||||
static_assert(sizeof(IocFreeParams) == 24, "IocFreeParams has wrong size");
|
||||
|
||||
struct IocParamParams {
|
||||
// Input
|
||||
u32_le handle{};
|
||||
HandleParameterType param{};
|
||||
// Output
|
||||
u32_le result{};
|
||||
};
|
||||
static_assert(sizeof(IocParamParams) == 12, "IocParamParams has wrong size");
|
||||
|
||||
struct IocGetIdParams {
|
||||
// Output
|
||||
u32_le id{};
|
||||
// Input
|
||||
u32_le handle{};
|
||||
};
|
||||
static_assert(sizeof(IocGetIdParams) == 8, "IocGetIdParams has wrong size");
|
||||
|
||||
NvResult IocCreate(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocAlloc(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocGetId(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocFromId(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocParam(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
NvResult IocFree(const std::vector<u8>& input, std::vector<u8>& output);
|
||||
|
||||
NvCore::Container& container;
|
||||
NvCore::NvMap& file;
|
||||
};
|
||||
|
||||
} // namespace Service::Nvidia::Devices
|
||||
|
||||
Reference in New Issue
Block a user