another try
This commit is contained in:
mgthepro
@@ -1,153 +1,153 @@
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// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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#include <functional>
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#include <optional>
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#include <span>
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#include <stop_token>
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#include "common/common_types.h"
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#include "video_core/engines/fermi_2d.h"
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#include "video_core/gpu.h"
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namespace Tegra {
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class MemoryManager;
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namespace Engines {
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class AccelerateDMAInterface;
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}
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namespace Control {
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struct ChannelState;
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}
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} // namespace Tegra
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namespace VideoCore {
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enum class QueryType {
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SamplesPassed,
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};
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constexpr std::size_t NumQueryTypes = 1;
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enum class LoadCallbackStage {
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Prepare,
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Build,
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Complete,
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};
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using DiskResourceLoadCallback = std::function<void(LoadCallbackStage, std::size_t, std::size_t)>;
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class RasterizerInterface {
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public:
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virtual ~RasterizerInterface() = default;
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/// Dispatches a draw invocation
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virtual void Draw(bool is_indexed, u32 instance_count) = 0;
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/// Clear the current framebuffer
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virtual void Clear() = 0;
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/// Dispatches a compute shader invocation
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virtual void DispatchCompute() = 0;
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/// Resets the counter of a query
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virtual void ResetCounter(QueryType type) = 0;
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/// Records a GPU query and caches it
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virtual void Query(GPUVAddr gpu_addr, QueryType type, std::optional<u64> timestamp) = 0;
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/// Signal an uniform buffer binding
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virtual void BindGraphicsUniformBuffer(size_t stage, u32 index, GPUVAddr gpu_addr,
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u32 size) = 0;
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/// Signal disabling of a uniform buffer
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virtual void DisableGraphicsUniformBuffer(size_t stage, u32 index) = 0;
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/// Signal a GPU based semaphore as a fence
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virtual void SignalFence(std::function<void()>&& func) = 0;
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/// Send an operation to be done after a certain amount of flushes.
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virtual void SyncOperation(std::function<void()>&& func) = 0;
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/// Signal a GPU based syncpoint as a fence
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virtual void SignalSyncPoint(u32 value) = 0;
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/// Signal a GPU based reference as point
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virtual void SignalReference() = 0;
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/// Release all pending fences.
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virtual void ReleaseFences() = 0;
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/// Notify rasterizer that all caches should be flushed to Switch memory
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virtual void FlushAll() = 0;
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/// Notify rasterizer that any caches of the specified region should be flushed to Switch memory
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virtual void FlushRegion(VAddr addr, u64 size) = 0;
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/// Check if the the specified memory area requires flushing to CPU Memory.
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virtual bool MustFlushRegion(VAddr addr, u64 size) = 0;
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/// Notify rasterizer that any caches of the specified region should be invalidated
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virtual void InvalidateRegion(VAddr addr, u64 size) = 0;
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/// Notify rasterizer that any caches of the specified region are desync with guest
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virtual void OnCPUWrite(VAddr addr, u64 size) = 0;
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/// Sync memory between guest and host.
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virtual void InvalidateGPUCache() = 0;
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/// Unmap memory range
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virtual void UnmapMemory(VAddr addr, u64 size) = 0;
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/// Remap GPU memory range. This means underneath backing memory changed
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virtual void ModifyGPUMemory(size_t as_id, GPUVAddr addr, u64 size) = 0;
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/// Notify rasterizer that any caches of the specified region should be flushed to Switch memory
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/// and invalidated
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virtual void FlushAndInvalidateRegion(VAddr addr, u64 size) = 0;
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/// Notify the host renderer to wait for previous primitive and compute operations.
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virtual void WaitForIdle() = 0;
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/// Notify the host renderer to wait for reads and writes to render targets and flush caches.
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virtual void FragmentBarrier() = 0;
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/// Notify the host renderer to make available previous render target writes.
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virtual void TiledCacheBarrier() = 0;
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/// Notify the rasterizer to send all written commands to the host GPU.
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virtual void FlushCommands() = 0;
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/// Notify rasterizer that a frame is about to finish
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virtual void TickFrame() = 0;
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/// Attempt to use a faster method to perform a surface copy
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[[nodiscard]] virtual bool AccelerateSurfaceCopy(
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const Tegra::Engines::Fermi2D::Surface& src, const Tegra::Engines::Fermi2D::Surface& dst,
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const Tegra::Engines::Fermi2D::Config& copy_config) {
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return false;
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}
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[[nodiscard]] virtual Tegra::Engines::AccelerateDMAInterface& AccessAccelerateDMA() = 0;
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virtual void AccelerateInlineToMemory(GPUVAddr address, size_t copy_size,
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std::span<const u8> memory) = 0;
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/// Attempt to use a faster method to display the framebuffer to screen
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[[nodiscard]] virtual bool AccelerateDisplay(const Tegra::FramebufferConfig& config,
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VAddr framebuffer_addr, u32 pixel_stride) {
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return false;
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}
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/// Increase/decrease the number of object in pages touching the specified region
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virtual void UpdatePagesCachedCount(VAddr addr, u64 size, int delta) {}
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/// Initialize disk cached resources for the game being emulated
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virtual void LoadDiskResources(u64 title_id, std::stop_token stop_loading,
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const DiskResourceLoadCallback& callback) {}
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virtual void InitializeChannel(Tegra::Control::ChannelState& channel) {}
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virtual void BindChannel(Tegra::Control::ChannelState& channel) {}
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virtual void ReleaseChannel(s32 channel_id) {}
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};
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} // namespace VideoCore
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// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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#include <functional>
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#include <optional>
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#include <span>
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#include <stop_token>
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#include "common/common_types.h"
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#include "video_core/engines/fermi_2d.h"
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#include "video_core/gpu.h"
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namespace Tegra {
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class MemoryManager;
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namespace Engines {
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class AccelerateDMAInterface;
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}
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namespace Control {
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struct ChannelState;
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}
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} // namespace Tegra
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namespace VideoCore {
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enum class QueryType {
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SamplesPassed,
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};
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constexpr std::size_t NumQueryTypes = 1;
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enum class LoadCallbackStage {
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Prepare,
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Build,
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Complete,
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};
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using DiskResourceLoadCallback = std::function<void(LoadCallbackStage, std::size_t, std::size_t)>;
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class RasterizerInterface {
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public:
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virtual ~RasterizerInterface() = default;
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/// Dispatches a draw invocation
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virtual void Draw(bool is_indexed, u32 instance_count) = 0;
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/// Clear the current framebuffer
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virtual void Clear() = 0;
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/// Dispatches a compute shader invocation
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virtual void DispatchCompute() = 0;
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/// Resets the counter of a query
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virtual void ResetCounter(QueryType type) = 0;
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/// Records a GPU query and caches it
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virtual void Query(GPUVAddr gpu_addr, QueryType type, std::optional<u64> timestamp) = 0;
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/// Signal an uniform buffer binding
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virtual void BindGraphicsUniformBuffer(size_t stage, u32 index, GPUVAddr gpu_addr,
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u32 size) = 0;
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/// Signal disabling of a uniform buffer
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virtual void DisableGraphicsUniformBuffer(size_t stage, u32 index) = 0;
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/// Signal a GPU based semaphore as a fence
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virtual void SignalFence(std::function<void()>&& func) = 0;
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/// Send an operation to be done after a certain amount of flushes.
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virtual void SyncOperation(std::function<void()>&& func) = 0;
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/// Signal a GPU based syncpoint as a fence
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virtual void SignalSyncPoint(u32 value) = 0;
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/// Signal a GPU based reference as point
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virtual void SignalReference() = 0;
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/// Release all pending fences.
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virtual void ReleaseFences() = 0;
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/// Notify rasterizer that all caches should be flushed to Switch memory
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virtual void FlushAll() = 0;
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/// Notify rasterizer that any caches of the specified region should be flushed to Switch memory
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virtual void FlushRegion(VAddr addr, u64 size) = 0;
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/// Check if the the specified memory area requires flushing to CPU Memory.
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virtual bool MustFlushRegion(VAddr addr, u64 size) = 0;
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/// Notify rasterizer that any caches of the specified region should be invalidated
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virtual void InvalidateRegion(VAddr addr, u64 size) = 0;
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/// Notify rasterizer that any caches of the specified region are desync with guest
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virtual void OnCPUWrite(VAddr addr, u64 size) = 0;
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/// Sync memory between guest and host.
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virtual void InvalidateGPUCache() = 0;
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/// Unmap memory range
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virtual void UnmapMemory(VAddr addr, u64 size) = 0;
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/// Remap GPU memory range. This means underneath backing memory changed
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virtual void ModifyGPUMemory(size_t as_id, GPUVAddr addr, u64 size) = 0;
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/// Notify rasterizer that any caches of the specified region should be flushed to Switch memory
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/// and invalidated
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virtual void FlushAndInvalidateRegion(VAddr addr, u64 size) = 0;
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/// Notify the host renderer to wait for previous primitive and compute operations.
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virtual void WaitForIdle() = 0;
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/// Notify the host renderer to wait for reads and writes to render targets and flush caches.
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virtual void FragmentBarrier() = 0;
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/// Notify the host renderer to make available previous render target writes.
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virtual void TiledCacheBarrier() = 0;
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/// Notify the rasterizer to send all written commands to the host GPU.
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virtual void FlushCommands() = 0;
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/// Notify rasterizer that a frame is about to finish
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virtual void TickFrame() = 0;
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/// Attempt to use a faster method to perform a surface copy
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[[nodiscard]] virtual bool AccelerateSurfaceCopy(
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const Tegra::Engines::Fermi2D::Surface& src, const Tegra::Engines::Fermi2D::Surface& dst,
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const Tegra::Engines::Fermi2D::Config& copy_config) {
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return false;
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}
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[[nodiscard]] virtual Tegra::Engines::AccelerateDMAInterface& AccessAccelerateDMA() = 0;
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virtual void AccelerateInlineToMemory(GPUVAddr address, size_t copy_size,
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std::span<const u8> memory) = 0;
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/// Attempt to use a faster method to display the framebuffer to screen
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[[nodiscard]] virtual bool AccelerateDisplay(const Tegra::FramebufferConfig& config,
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VAddr framebuffer_addr, u32 pixel_stride) {
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return false;
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}
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/// Increase/decrease the number of object in pages touching the specified region
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virtual void UpdatePagesCachedCount(VAddr addr, u64 size, int delta) {}
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/// Initialize disk cached resources for the game being emulated
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virtual void LoadDiskResources(u64 title_id, std::stop_token stop_loading,
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const DiskResourceLoadCallback& callback) {}
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virtual void InitializeChannel(Tegra::Control::ChannelState& channel) {}
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virtual void BindChannel(Tegra::Control::ChannelState& channel) {}
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virtual void ReleaseChannel(s32 channel_id) {}
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};
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} // namespace VideoCore
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