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early-access version 1475

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This commit is contained in:
pineappleEA
2021-02-19 01:42:57 +01:00
parent 762f890987
commit d8bef01911
56 changed files with 3213 additions and 736 deletions
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27
externals/dynarmic/src/frontend/ir/microinstruction.cpp vendored
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@@ -155,6 +155,7 @@ bool Inst::ReadsFromCPSR() const {
case Opcode::A32GetCFlag:
case Opcode::A32GetVFlag:
case Opcode::A32GetGEFlags:
case Opcode::A32UpdateUpperLocationDescriptor:
case Opcode::A64GetCFlag:
case Opcode::A64GetNZCVRaw:
case Opcode::ConditionalSelect32:
@@ -179,6 +180,7 @@ bool Inst::WritesToCPSR() const {
case Opcode::A32OrQFlag:
case Opcode::A32SetGEFlags:
case Opcode::A32SetGEFlagsCompressed:
case Opcode::A32UpdateUpperLocationDescriptor:
case Opcode::A64SetNZCVRaw:
case Opcode::A64SetNZCV:
return true;
@@ -518,18 +520,19 @@ bool Inst::IsSetCheckBitOperation() const {
}
bool Inst::MayHaveSideEffects() const {
return op == Opcode::PushRSB ||
op == Opcode::A64DataCacheOperationRaised ||
IsSetCheckBitOperation() ||
IsBarrier() ||
CausesCPUException() ||
WritesToCoreRegister() ||
WritesToSystemRegister() ||
WritesToCPSR() ||
WritesToFPCR() ||
WritesToFPSR() ||
AltersExclusiveState() ||
IsMemoryWrite() ||
return op == Opcode::PushRSB ||
op == Opcode::A64DataCacheOperationRaised ||
op == Opcode::A64InstructionCacheOperationRaised ||
IsSetCheckBitOperation() ||
IsBarrier() ||
CausesCPUException() ||
WritesToCoreRegister() ||
WritesToSystemRegister() ||
WritesToCPSR() ||
WritesToFPCR() ||
WritesToFPSR() ||
AltersExclusiveState() ||
IsMemoryWrite() ||
IsCoprocessorInstruction();
}