hdkv/yuzu
1
Fork 0
Code Issues Pull Requests Releases 1 Activity

early-access version 1390

Browse Source
This commit is contained in:
pineappleEA
2021-01-28 19:16:34 +01:00
parent 817df4ca70
commit ef74ce8ba1
10 changed files with 109 additions and 69 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
externals/dynarmic/include/dynarmic/A64/config.h vendored
View File

@@ -110,7 +110,6 @@ struct UserCallbacks {
virtual void ExceptionRaised(VAddr pc, Exception exception) = 0;
virtual void DataCacheOperationRaised(DataCacheOperation /*op*/, VAddr /*value*/) {}
virtual void InstructionSynchronizationBarrierRaised() {}
// Timing-related callbacks
// ticks ticks have passed
@@ -154,11 +153,6 @@ struct UserConfig {
/// Executing DC ZVA in this mode will result in zeros being written to memory.
bool hook_data_cache_operations = false;
/// When set to true, UserCallbacks::InstructionSynchronizationBarrierRaised will be
/// called when an ISB instruction is executed.
/// When set to false, ISB will be treated as a NOP instruction.
bool hook_isb = false;
/// When set to true, UserCallbacks::ExceptionRaised will be called when any hint
/// instruction is executed.
bool hook_hint_instructions = false;

10
externals/dynarmic/src/backend/x64/a64_emit_x64.cpp vendored
View File

@@ -659,13 +659,11 @@ void A64EmitX64::EmitA64DataMemoryBarrier(A64EmitContext&, IR::Inst*) {
code.lfence();
}
void A64EmitX64::EmitA64InstructionSynchronizationBarrier(A64EmitContext& ctx, IR::Inst*) {
if (!conf.hook_isb) {
return;
}
void A64EmitX64::EmitA64InstructionSynchronizationBarrier(A64EmitContext& ctx, IR::Inst* ) {
ctx.reg_alloc.HostCall(nullptr);
Devirtualize<&A64::UserCallbacks::InstructionSynchronizationBarrierRaised>(conf.callbacks).EmitCall(code);
code.mov(code.ABI_PARAM1, reinterpret_cast<u64>(jit_interface));
code.CallLambda([](A64::Jit* jit) { jit->ClearCache(); });
}
void A64EmitX64::EmitA64GetCNTFRQ(A64EmitContext& ctx, IR::Inst* inst) {