early-access version 2547
This commit is contained in:
parent
b98acbedfe
commit
f1141cfd5d
@ -1,7 +1,7 @@
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yuzu emulator early access
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yuzu emulator early access
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=============
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=============
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This is the source code for early-access 2545.
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This is the source code for early-access 2547.
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## Legal Notice
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## Legal Notice
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@ -315,7 +315,7 @@ public:
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private:
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private:
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constexpr explicit Iterator(ImplIterator it) : m_impl(it) {}
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constexpr explicit Iterator(ImplIterator it) : m_impl(it) {}
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constexpr explicit Iterator(ImplIterator::pointer p) : m_impl(p) {}
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constexpr explicit Iterator(typename ImplIterator::pointer p) : m_impl(p) {}
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constexpr ImplIterator GetImplIterator() const {
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constexpr ImplIterator GetImplIterator() const {
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return m_impl;
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return m_impl;
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@ -148,8 +148,8 @@ std::shared_ptr<Dynarmic::A32::Jit> ARM_Dynarmic_32::MakeJit(Common::PageTable*
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config.wall_clock_cntpct = uses_wall_clock;
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config.wall_clock_cntpct = uses_wall_clock;
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// Code cache size
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// Code cache size
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config.code_cache_size = 512_MiB;
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config.code_cache_size = 128_MiB;
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config.far_code_offset = 400_MiB;
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config.far_code_offset = 100_MiB;
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// Safe optimizations
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// Safe optimizations
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if (Settings::values.cpu_debug_mode) {
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if (Settings::values.cpu_debug_mode) {
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@ -208,8 +208,8 @@ std::shared_ptr<Dynarmic::A64::Jit> ARM_Dynarmic_64::MakeJit(Common::PageTable*
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config.wall_clock_cntpct = uses_wall_clock;
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config.wall_clock_cntpct = uses_wall_clock;
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// Code cache size
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// Code cache size
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config.code_cache_size = 512_MiB;
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config.code_cache_size = 128_MiB;
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config.far_code_offset = 400_MiB;
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config.far_code_offset = 100_MiB;
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// Safe optimizations
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// Safe optimizations
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if (Settings::values.cpu_debug_mode) {
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if (Settings::values.cpu_debug_mode) {
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@ -19,17 +19,13 @@ class KPageBuffer final : public KSlabAllocated<KPageBuffer> {
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public:
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public:
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KPageBuffer() = default;
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KPageBuffer() = default;
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PAddr GetPhysicalAddress(Core::System& system) const {
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return system.DeviceMemory().GetPhysicalAddr(this);
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}
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static KPageBuffer* FromPhysicalAddress(Core::System& system, PAddr phys_addr) {
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static KPageBuffer* FromPhysicalAddress(Core::System& system, PAddr phys_addr) {
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ASSERT(Common::IsAligned(phys_addr, PageSize));
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ASSERT(Common::IsAligned(phys_addr, PageSize));
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return reinterpret_cast<KPageBuffer*>(system.DeviceMemory().GetPointer(phys_addr));
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return reinterpret_cast<KPageBuffer*>(system.DeviceMemory().GetPointer(phys_addr));
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}
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}
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private:
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private:
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alignas(PageSize) std::array<u8, PageSize> m_buffer{};
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[[maybe_unused]] alignas(PageSize) std::array<u8, PageSize> m_buffer{};
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};
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};
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static_assert(sizeof(KPageBuffer) == PageSize);
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static_assert(sizeof(KPageBuffer) == PageSize);
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@ -22,7 +22,7 @@ constexpr u32 NUM_TEXTURE_AND_IMAGE_SCALING_WORDS =
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struct RescalingLayout {
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struct RescalingLayout {
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alignas(16) std::array<u32, NUM_TEXTURE_SCALING_WORDS> rescaling_textures;
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alignas(16) std::array<u32, NUM_TEXTURE_SCALING_WORDS> rescaling_textures;
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alignas(16) std::array<u32, NUM_IMAGE_SCALING_WORDS> rescaling_images;
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alignas(16) std::array<u32, NUM_IMAGE_SCALING_WORDS> rescaling_images;
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alignas(16) u32 down_factor;
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u32 down_factor;
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};
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};
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constexpr u32 RESCALING_LAYOUT_WORDS_OFFSET = offsetof(RescalingLayout, rescaling_textures);
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constexpr u32 RESCALING_LAYOUT_WORDS_OFFSET = offsetof(RescalingLayout, rescaling_textures);
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constexpr u32 RESCALING_LAYOUT_DOWN_FACTOR_OFFSET = offsetof(RescalingLayout, down_factor);
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constexpr u32 RESCALING_LAYOUT_DOWN_FACTOR_OFFSET = offsetof(RescalingLayout, down_factor);
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@ -212,11 +212,11 @@ IR::Program TranslateProgram(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Blo
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}
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}
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Optimization::SsaRewritePass(program);
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Optimization::SsaRewritePass(program);
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Optimization::ConstantPropagationPass(program);
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Optimization::GlobalMemoryToStorageBufferPass(program);
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Optimization::GlobalMemoryToStorageBufferPass(program);
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Optimization::TexturePass(env, program);
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Optimization::TexturePass(env, program);
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Optimization::ConstantPropagationPass(program);
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if (Settings::values.resolution_info.active) {
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if (Settings::values.resolution_info.active) {
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Optimization::RescalingPass(program);
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Optimization::RescalingPass(program);
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}
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}
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@ -334,7 +334,8 @@ std::optional<LowAddrInfo> TrackLowAddress(IR::Inst* inst) {
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/// Tries to track the storage buffer address used by a global memory instruction
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/// Tries to track the storage buffer address used by a global memory instruction
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std::optional<StorageBufferAddr> Track(const IR::Value& value, const Bias* bias) {
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std::optional<StorageBufferAddr> Track(const IR::Value& value, const Bias* bias) {
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const auto pred{[bias](const IR::Inst* inst) -> std::optional<StorageBufferAddr> {
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const auto pred{[bias](const IR::Inst* inst) -> std::optional<StorageBufferAddr> {
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if (inst->GetOpcode() != IR::Opcode::GetCbufU32) {
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if (inst->GetOpcode() != IR::Opcode::GetCbufU32 &&
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inst->GetOpcode() != IR::Opcode::GetCbufU32x2) {
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return std::nullopt;
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return std::nullopt;
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}
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}
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const IR::Value index{inst->Arg(0)};
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const IR::Value index{inst->Arg(0)};
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@ -183,6 +183,31 @@ void ScaleIntegerComposite(IR::IREmitter& ir, IR::Inst& inst, const IR::U1& is_s
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}
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}
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}
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}
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void ScaleIntegerOffsetComposite(IR::IREmitter& ir, IR::Inst& inst, const IR::U1& is_scaled,
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size_t index) {
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const IR::Value composite{inst.Arg(index)};
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if (composite.IsEmpty()) {
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return;
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}
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const auto info{inst.Flags<IR::TextureInstInfo>()};
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const IR::U32 x{Scale(ir, is_scaled, IR::U32{ir.CompositeExtract(composite, 0)})};
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const IR::U32 y{Scale(ir, is_scaled, IR::U32{ir.CompositeExtract(composite, 1)})};
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switch (info.type) {
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case TextureType::ColorArray2D:
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case TextureType::Color2D:
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inst.SetArg(index, ir.CompositeConstruct(x, y));
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break;
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case TextureType::Color1D:
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case TextureType::ColorArray1D:
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case TextureType::Color3D:
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case TextureType::ColorCube:
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case TextureType::ColorArrayCube:
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case TextureType::Buffer:
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// Nothing to patch here
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break;
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}
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}
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void SubScaleCoord(IR::IREmitter& ir, IR::Inst& inst, const IR::U1& is_scaled) {
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void SubScaleCoord(IR::IREmitter& ir, IR::Inst& inst, const IR::U1& is_scaled) {
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const auto info{inst.Flags<IR::TextureInstInfo>()};
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const auto info{inst.Flags<IR::TextureInstInfo>()};
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const IR::Value coord{inst.Arg(1)};
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const IR::Value coord{inst.Arg(1)};
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@ -220,7 +245,7 @@ void SubScaleImageFetch(IR::Block& block, IR::Inst& inst) {
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const IR::U1 is_scaled{ir.IsTextureScaled(ir.Imm32(info.descriptor_index))};
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const IR::U1 is_scaled{ir.IsTextureScaled(ir.Imm32(info.descriptor_index))};
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SubScaleCoord(ir, inst, is_scaled);
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SubScaleCoord(ir, inst, is_scaled);
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// Scale ImageFetch offset
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// Scale ImageFetch offset
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ScaleIntegerComposite(ir, inst, is_scaled, 2);
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ScaleIntegerOffsetComposite(ir, inst, is_scaled, 2);
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}
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}
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void SubScaleImageRead(IR::Block& block, IR::Inst& inst) {
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void SubScaleImageRead(IR::Block& block, IR::Inst& inst) {
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@ -242,7 +267,7 @@ void PatchImageFetch(IR::Block& block, IR::Inst& inst) {
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const IR::U1 is_scaled{ir.IsTextureScaled(ir.Imm32(info.descriptor_index))};
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const IR::U1 is_scaled{ir.IsTextureScaled(ir.Imm32(info.descriptor_index))};
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ScaleIntegerComposite(ir, inst, is_scaled, 1);
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ScaleIntegerComposite(ir, inst, is_scaled, 1);
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// Scale ImageFetch offset
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// Scale ImageFetch offset
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ScaleIntegerComposite(ir, inst, is_scaled, 2);
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ScaleIntegerOffsetComposite(ir, inst, is_scaled, 2);
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}
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}
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void PatchImageRead(IR::Block& block, IR::Inst& inst) {
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void PatchImageRead(IR::Block& block, IR::Inst& inst) {
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@ -370,8 +370,31 @@ void Maxwell3D::CallMethodFromMME(u32 method, u32 method_argument) {
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}
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}
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void Maxwell3D::ProcessTopologyOverride() {
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void Maxwell3D::ProcessTopologyOverride() {
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using PrimitiveTopology = Maxwell3D::Regs::PrimitiveTopology;
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using PrimitiveTopologyOverride = Maxwell3D::Regs::PrimitiveTopologyOverride;
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PrimitiveTopology topology{};
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switch (regs.topology_override) {
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case PrimitiveTopologyOverride::None:
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topology = regs.draw.topology;
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break;
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case PrimitiveTopologyOverride::Points:
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topology = PrimitiveTopology::Points;
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break;
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case PrimitiveTopologyOverride::Lines:
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topology = PrimitiveTopology::Lines;
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break;
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case PrimitiveTopologyOverride::LineStrip:
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topology = PrimitiveTopology::LineStrip;
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break;
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default:
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topology = static_cast<PrimitiveTopology>(regs.topology_override);
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break;
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}
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if (use_topology_override) {
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if (use_topology_override) {
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regs.draw.topology.Assign(regs.topology_override);
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regs.draw.topology.Assign(topology);
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}
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}
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}
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}
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@ -367,6 +367,22 @@ public:
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Patches = 0xe,
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Patches = 0xe,
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};
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};
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// Constants as from NVC0_3D_UNK1970_D3D
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// https://gitlab.freedesktop.org/mesa/mesa/-/blob/main/src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h#L1598
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enum class PrimitiveTopologyOverride : u32 {
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None = 0x0,
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Points = 0x1,
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Lines = 0x2,
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LineStrip = 0x3,
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Triangles = 0x4,
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TriangleStrip = 0x5,
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LinesAdjacency = 0xa,
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LineStripAdjacency = 0xb,
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TrianglesAdjacency = 0xc,
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TriangleStripAdjacency = 0xd,
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Patches = 0xe,
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};
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enum class IndexFormat : u32 {
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enum class IndexFormat : u32 {
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UnsignedByte = 0x0,
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UnsignedByte = 0x0,
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UnsignedShort = 0x1,
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UnsignedShort = 0x1,
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@ -1251,7 +1267,7 @@ public:
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INSERT_PADDING_WORDS_NOINIT(0xC);
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INSERT_PADDING_WORDS_NOINIT(0xC);
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PrimitiveTopology topology_override;
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PrimitiveTopologyOverride topology_override;
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INSERT_PADDING_WORDS_NOINIT(0x12);
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INSERT_PADDING_WORDS_NOINIT(0x12);
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@ -2,6 +2,7 @@
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// Licensed under GPLv2 or any later version
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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// Refer to the license.txt file included.
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#include <array>
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#include <cstring>
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#include <cstring>
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#include <memory>
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#include <memory>
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#include <optional>
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#include <optional>
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@ -292,7 +293,7 @@ std::pair<VkBuffer, VkDeviceSize> QuadIndexedPass::Assemble(
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.srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT,
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.srcAccessMask = VK_ACCESS_SHADER_WRITE_BIT,
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.dstAccessMask = VK_ACCESS_INDEX_READ_BIT,
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.dstAccessMask = VK_ACCESS_INDEX_READ_BIT,
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};
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};
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const std::array push_constants{base_vertex, index_shift};
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const std::array<u32, 2> push_constants{base_vertex, index_shift};
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const VkDescriptorSet set = descriptor_allocator.Commit();
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const VkDescriptorSet set = descriptor_allocator.Commit();
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device.GetLogical().UpdateDescriptorSet(set, *descriptor_template, descriptor_data);
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device.GetLogical().UpdateDescriptorSet(set, *descriptor_template, descriptor_data);
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cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_COMPUTE, *pipeline);
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cmdbuf.BindPipeline(VK_PIPELINE_BIND_POINT_COMPUTE, *pipeline);
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void TextureCache<P>::FillImageViews(DescriptorTable<TICEntry>& table,
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void TextureCache<P>::FillImageViews(DescriptorTable<TICEntry>& table,
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std::span<ImageViewId> cached_image_view_ids,
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std::span<ImageViewId> cached_image_view_ids,
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std::span<ImageViewInOut> views) {
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std::span<ImageViewInOut> views) {
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bool has_blacklisted = false;
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bool has_blacklisted;
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do {
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do {
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has_deleted_images = false;
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has_deleted_images = false;
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if constexpr (has_blacklists) {
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if constexpr (has_blacklists) {
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@ -1763,7 +1763,7 @@ void TextureCache<P>::SynchronizeAliases(ImageId image_id) {
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});
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});
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const auto& resolution = Settings::values.resolution_info;
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const auto& resolution = Settings::values.resolution_info;
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for (const AliasedImage* const aliased : aliased_images) {
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for (const AliasedImage* const aliased : aliased_images) {
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if (!resolution.active || !any_rescaled) {
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if (!resolution.active | !any_rescaled) {
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CopyImage(image_id, aliased->id, aliased->copies);
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CopyImage(image_id, aliased->id, aliased->copies);
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continue;
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continue;
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}
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}
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@ -1774,7 +1774,19 @@ void TextureCache<P>::SynchronizeAliases(ImageId image_id) {
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continue;
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continue;
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}
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}
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ScaleUp(aliased_image);
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ScaleUp(aliased_image);
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CopyImage(image_id, aliased->id, aliased->copies);
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const bool both_2d{image.info.type == ImageType::e2D &&
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aliased_image.info.type == ImageType::e2D};
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auto copies = aliased->copies;
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for (auto copy : copies) {
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copy.extent.width = std::max<u32>(
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(copy.extent.width * resolution.up_scale) >> resolution.down_shift, 1);
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if (both_2d) {
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copy.extent.height = std::max<u32>(
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(copy.extent.height * resolution.up_scale) >> resolution.down_shift, 1);
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}
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}
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CopyImage(image_id, aliased->id, copies);
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}
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}
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}
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}
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Block a user