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early-access version 1870

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This commit is contained in:
pineappleEA
2021-07-12 20:42:10 +02:00
parent c28ecd0f43
commit f8a45c1e72
36 changed files with 362 additions and 150 deletions
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13
src/shader_recompiler/frontend/maxwell/control_flow.cpp
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@@ -5,7 +5,6 @@
#include <algorithm>
#include <array>
#include <optional>
#include <ranges>
#include <string>
#include <utility>
@@ -151,18 +150,18 @@ std::pair<Location, Stack> Stack::Pop(Token token) const {
}
std::optional<Location> Stack::Peek(Token token) const {
const auto reverse_entries{entries | std::views::reverse};
const auto it{std::ranges::find(reverse_entries, token, &StackEntry::token)};
if (it == reverse_entries.end()) {
const auto it{std::find_if(entries.rbegin(), entries.rend(),
[token](const auto& entry) { return entry.token == token; })};
if (it == entries.rend()) {
return std::nullopt;
}
return it->target;
}
Stack Stack::Remove(Token token) const {
const auto reverse_entries{entries | std::views::reverse};
const auto it{std::ranges::find(reverse_entries, token, &StackEntry::token)};
const auto pos{std::distance(reverse_entries.begin(), it)};
const auto it{std::find_if(entries.rbegin(), entries.rend(),
[token](const auto& entry) { return entry.token == token; })};
const auto pos{std::distance(entries.rbegin(), it)};
Stack result;
result.entries.insert(result.entries.end(), entries.begin(), entries.end() - pos - 1);
return result;

1
src/shader_recompiler/frontend/maxwell/control_flow.h
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@@ -161,7 +161,6 @@ private:
Environment& env;
ObjectPool<Block>& block_pool;
boost::container::small_vector<Function, 1> functions;
FunctionId current_function_id{0};
Location program_start;
bool exits_to_dispatcher{};
Block* dispatch_block{};

17
src/shader_recompiler/frontend/maxwell/structured_control_flow.cpp
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@@ -4,7 +4,6 @@
#include <algorithm>
#include <memory>
#include <ranges>
#include <string>
#include <unordered_map>
#include <utility>
@@ -167,7 +166,7 @@ std::string DumpExpr(const Statement* stmt) {
}
}
std::string DumpTree(const Tree& tree, u32 indentation = 0) {
[[maybe_unused]] std::string DumpTree(const Tree& tree, u32 indentation = 0) {
std::string ret;
std::string indent(indentation, ' ');
for (auto stmt = tree.begin(); stmt != tree.end(); ++stmt) {
@@ -313,12 +312,11 @@ bool NeedsLift(Node goto_stmt, Node label_stmt) noexcept {
class GotoPass {
public:
explicit GotoPass(Flow::CFG& cfg, ObjectPool<IR::Inst>& inst_pool_,
ObjectPool<IR::Block>& block_pool_, ObjectPool<Statement>& stmt_pool)
: inst_pool{inst_pool_}, block_pool{block_pool_}, pool{stmt_pool} {
explicit GotoPass(Flow::CFG& cfg, ObjectPool<Statement>& stmt_pool) : pool{stmt_pool} {
std::vector gotos{BuildTree(cfg)};
for (const Node& goto_stmt : gotos | std::views::reverse) {
RemoveGoto(goto_stmt);
const auto end{gotos.rend()};
for (auto goto_stmt = gotos.rbegin(); goto_stmt != end; ++goto_stmt) {
RemoveGoto(*goto_stmt);
}
}
@@ -616,8 +614,6 @@ private:
return parent_tree.insert(std::next(loop), *new_goto);
}
ObjectPool<IR::Inst>& inst_pool;
ObjectPool<IR::Block>& block_pool;
ObjectPool<Statement>& pool;
Statement root_stmt{FunctionTag{}};
};
@@ -864,7 +860,6 @@ private:
ObjectPool<IR::Block>& block_pool;
Environment& env;
IR::AbstractSyntaxList& syntax_list;
u32 loop_id{};
// TODO: C++20 Remove this when all compilers support constexpr std::vector
#if __cpp_lib_constexpr_vector >= 201907
@@ -878,7 +873,7 @@ private:
IR::AbstractSyntaxList BuildASL(ObjectPool<IR::Inst>& inst_pool, ObjectPool<IR::Block>& block_pool,
Environment& env, Flow::CFG& cfg) {
ObjectPool<Statement> stmt_pool{64};
GotoPass goto_pass{cfg, inst_pool, block_pool, stmt_pool};
GotoPass goto_pass{cfg, stmt_pool};
Statement& root{goto_pass.RootStatement()};
IR::AbstractSyntaxList syntax_list;
TranslatePass{inst_pool, block_pool, stmt_pool, env, root, syntax_list};

12
src/shader_recompiler/frontend/maxwell/translate/impl/atomic_operations_global_memory.cpp
View File

@@ -59,14 +59,14 @@ IR::U32U64 ApplyIntegerAtomOp(IR::IREmitter& ir, const IR::U32U64& offset, const
IR::Value ApplyFpAtomOp(IR::IREmitter& ir, const IR::U64& offset, const IR::Value& op_b, AtomOp op,
AtomSize size) {
static constexpr IR::FpControl f16_control{
.no_contraction{false},
.rounding{IR::FpRounding::RN},
.fmz_mode{IR::FmzMode::DontCare},
.no_contraction = false,
.rounding = IR::FpRounding::RN,
.fmz_mode = IR::FmzMode::DontCare,
};
static constexpr IR::FpControl f32_control{
.no_contraction{false},
.rounding{IR::FpRounding::RN},
.fmz_mode{IR::FmzMode::FTZ},
.no_contraction = false,
.rounding = IR::FpRounding::RN,
.fmz_mode = IR::FmzMode::FTZ,
};
switch (op) {
case AtomOp::ADD:

4
src/shader_recompiler/frontend/maxwell/translate/impl/integer_floating_point_conversion.cpp
View File

@@ -104,7 +104,9 @@ void I2F(TranslatorVisitor& v, u64 insn, IR::U32U64 src) {
.rounding = CastFpRounding(i2f.fp_rounding),
.fmz_mode = IR::FmzMode::DontCare,
};
auto value{v.ir.ConvertIToF(dst_bitsize, conversion_src_bitsize, is_signed, src, fp_control)};
auto value{v.ir.ConvertIToF(static_cast<size_t>(dst_bitsize),
static_cast<size_t>(conversion_src_bitsize), is_signed, src,
fp_control)};
if (i2f.neg != 0) {
if (i2f.abs != 0 || !is_signed) {
// We know the value is positive

12
src/shader_recompiler/frontend/maxwell/translate/impl/load_store_attribute.cpp
View File

@@ -80,10 +80,10 @@ void TranslatorVisitor::ALD(u64 insn) {
for (u32 element = 0; element < num_elements; ++element) {
if (ald.patch != 0) {
const IR::Patch patch{offset / 4 + element};
F(ald.dest_reg + element, ir.GetPatch(patch));
F(ald.dest_reg + static_cast<int>(element), ir.GetPatch(patch));
} else {
const IR::Attribute attr{offset / 4 + element};
F(ald.dest_reg + element, ir.GetAttribute(attr, vertex));
F(ald.dest_reg + static_cast<int>(element), ir.GetAttribute(attr, vertex));
}
}
return;
@@ -92,7 +92,7 @@ void TranslatorVisitor::ALD(u64 insn) {
throw NotImplementedException("Indirect patch read");
}
HandleIndexed(*this, ald.index_reg, num_elements, [&](u32 element, IR::U32 final_offset) {
F(ald.dest_reg + element, ir.GetAttributeIndexed(final_offset, vertex));
F(ald.dest_reg + static_cast<int>(element), ir.GetAttributeIndexed(final_offset, vertex));
});
}
@@ -121,10 +121,10 @@ void TranslatorVisitor::AST(u64 insn) {
for (u32 element = 0; element < num_elements; ++element) {
if (ast.patch != 0) {
const IR::Patch patch{offset / 4 + element};
ir.SetPatch(patch, F(ast.src_reg + element));
ir.SetPatch(patch, F(ast.src_reg + static_cast<int>(element)));
} else {
const IR::Attribute attr{offset / 4 + element};
ir.SetAttribute(attr, F(ast.src_reg + element), vertex);
ir.SetAttribute(attr, F(ast.src_reg + static_cast<int>(element)), vertex);
}
}
return;
@@ -133,7 +133,7 @@ void TranslatorVisitor::AST(u64 insn) {
throw NotImplementedException("Indexed tessellation patch store");
}
HandleIndexed(*this, ast.index_reg, num_elements, [&](u32 element, IR::U32 final_offset) {
ir.SetAttributeIndexed(final_offset, F(ast.src_reg + element), vertex);
ir.SetAttributeIndexed(final_offset, F(ast.src_reg + static_cast<int>(element)), vertex);
});
}

3
src/shader_recompiler/frontend/maxwell/translate/impl/surface_atomic_operations.cpp
View File

@@ -69,9 +69,6 @@ TextureType GetType(Type type) {
}
IR::Value MakeCoords(TranslatorVisitor& v, IR::Reg reg, Type type) {
const auto array{[&](int index) {
return v.ir.BitFieldExtract(v.X(reg + index), v.ir.Imm32(0), v.ir.Imm32(16));
}};
switch (type) {
case Type::_1D:
case Type::BUFFER_1D:

8
src/shader_recompiler/frontend/maxwell/translate/impl/surface_load_store.cpp
View File

@@ -160,10 +160,10 @@ unsigned SwizzleMask(u64 swizzle) {
IR::Value MakeColor(IR::IREmitter& ir, IR::Reg reg, int num_regs) {
std::array<IR::U32, 4> colors;
for (int i = 0; i < num_regs; ++i) {
colors[i] = ir.GetReg(reg + i);
colors[static_cast<size_t>(i)] = ir.GetReg(reg + i);
}
for (int i = num_regs; i < 4; ++i) {
colors[i] = ir.Imm32(0);
colors[static_cast<size_t>(i)] = ir.Imm32(0);
}
return ir.CompositeConstruct(colors[0], colors[1], colors[2], colors[3]);
}
@@ -211,12 +211,12 @@ void TranslatorVisitor::SULD(u64 insn) {
if (is_typed) {
const int num_regs{SizeInRegs(suld.size)};
for (int i = 0; i < num_regs; ++i) {
X(dest_reg + i, IR::U32{ir.CompositeExtract(result, i)});
X(dest_reg + i, IR::U32{ir.CompositeExtract(result, static_cast<size_t>(i))});
}
} else {
const unsigned mask{SwizzleMask(suld.swizzle)};
const int bits{std::popcount(mask)};
if (!IR::IsAligned(dest_reg, bits == 3 ? 4 : bits)) {
if (!IR::IsAligned(dest_reg, bits == 3 ? 4 : static_cast<size_t>(bits))) {
throw NotImplementedException("Unaligned destination register");
}
for (unsigned component = 0; component < 4; ++component) {

20
src/shader_recompiler/frontend/maxwell/translate_program.cpp
View File

@@ -4,7 +4,6 @@
#include <algorithm>
#include <memory>
#include <ranges>
#include <vector>
#include "common/settings.h"
@@ -20,12 +19,19 @@
namespace Shader::Maxwell {
namespace {
IR::BlockList GenerateBlocks(const IR::AbstractSyntaxList& syntax_list) {
auto syntax_blocks{syntax_list | std::views::filter([](const auto& node) {
return node.type == IR::AbstractSyntaxNode::Type::Block;
})};
IR::BlockList blocks(std::ranges::distance(syntax_blocks));
std::ranges::transform(syntax_blocks, blocks.begin(),
[](const IR::AbstractSyntaxNode& node) { return node.data.block; });
size_t num_syntax_blocks{};
for (const auto& node : syntax_list) {
if (node.type == IR::AbstractSyntaxNode::Type::Block) {
++num_syntax_blocks;
}
}
IR::BlockList blocks;
blocks.reserve(num_syntax_blocks);
for (const auto& node : syntax_list) {
if (node.type == IR::AbstractSyntaxNode::Type::Block) {
blocks.push_back(node.data.block);
}
}
return blocks;
}